CPU caching of flash regions.
ajlennon at arcom.co.uk
Tue May 15 06:46:10 EDT 2001
> Actually, the board used for the offending profile is a board with paged
> access to the flash, so it's slightly slower than some others - but the
> overhead shouldn't be too high. And the cache benefit would be more
> What kind of chip is being used?
Two contiguous Intel Strataflash 28F640's giving 16Mb total
> What bus is it on?
> And how fast is it?
> Second. What kind of processor, and what kind of chipset are being used?
National Geode GX1 300Mhz with CS5530 support chipset
To generate some figures I knocked together code which reads the 16Mb from
the flash, paging as it goes. Nothing is done with the data. This takes
With the hardcoded value of CONFIG_JFFS2_FS_DEBUG set to 2 in
I get jffs2 root fs mount times in excess of 34s.
When I remove the debugging I get mount times of around 26s
Obviously the figures obtained from df need some massaging to take account
but I get:
/dev/root 14336 3760 10576 26% /
/dev/mtdblock1 1280 644 636 50% /var
/dev/ram0 3963 26 3733 1% /var/tmp
So what does this mean ? Can I expect a fourfold increase in mount time with
a full f/s ?
Should I be comparing a 26s jffs2 mount to an idealistic 4s 4Mb flash read ?
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