Power blackouts and brownouts

David Woodhouse dwmw2 at infradead.org
Fri Apr 27 10:34:32 EDT 2001

vipin.malik at daniel.com said:
>  No, but most well designed embedded systems will assert the reset
> line both on power up AND down. Actually, direction does not really
> matter. Reset is asserted when the power rail is out of spec, which
> will happen (due to the laws of physics), both on up and down.

> You wan't the reset line asserted on power down also, else the
> processor may "wander off" into the weeds and overwrite battery backed
> RAM or other such stuff if present.

Note that 'well designed embedded systems' does _not_ include the Intel
Assabet platform. I believe nothing ever asserts the flash reset line, so if
you reset while the flash is in a mode other than read mode, the CPU's reset
vector is pointing at status words :)

The only way to fix it when you've done this is to remove power, remove the 
battery, and wait for the on-board cap to run out of charge.

Fun. :)


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