Power blackouts and brownouts

[Bari Ari]

Chris Read wrote:

> Does anyone know what actually happens to a flash chip when the power 
> starts to fail during an erase or a write cycle? We are all trying to write 
> code which can recover when abruptly halted at any point, but can all the 
> devices which we are using claim the same?
> 
> I have noticed that several flash devices have a power on reset line; most 
> however do not. Whilst I appreciate that flash devices are not fully static 
> like SRAM or EPROM, and therefore must have some way of initialising in a 
> known state at power up; most devices appear to not need this external 
> signal. My hypothesis is therefore that this line may be more for abruptly 
> stopping any internal state machine during the first stages of a brown-out 
> whilst there is still sufficient power available to do so.
> 
> Any thoughts?
> 
> Chris Read

The answer depends on how the circuit designer engineered the power 
supplies and reset circuitry. How well was the circuit engineered to 
account for power failure and to minimize data corruption? The flash 
device characteristics are only part of the puzzle.

In one scenario the power supply for the flash device may hold within 
spec longer than the driver writing the data to it, in this scenario the 
flash device operates correctly and latches the data to its input 
register but the data latched may already be garbage based on the output 
driver from the device writing data to the data inputs on the flash 
since the drivers supply voltage is below spec at that clock edge when 
the data is latched.

Bari Ari                         email: bari at onelabs.com 
<mailto:bari at onelabs.com> <mailto:bari at onelabs.com>
O.N.E. Technologies
1505 Old Deerfield Road        tel: 773-252-9607
Highland Park, IL 60035        fax: 773-252-9604

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