[RPX Classic/Lite and byte ordering]

[Tim Bowman]

Tim Bowman <tbowman at emware.com> wrote:

> The rpxlite layer seems to be using memcpy_fromio, writeb, writew, etc,
> not __raw_writeb.  Should these be replaced with the raw versions?

Yes, in any case they should be using the __raw equivalents to force
untranslated byte ordering.  This allows the ENDIAN defines to work
appropriately.  I can't say if this is your problem, but you should
go 'raw' at the very least to be idiomatic with the other drivers.

-----------------

Ta-Da.... I fixed the problem in include/asm-ppc/io.h:
...
#define readb(addr) in_8((volatile u8 *)(addr))
#define writeb(b,addr) out_8((volatile u8 *)(addr), (b))
#if defined(CONFIG_APUS) || defined(RPXCLASSIC)
#define readw(addr) (*(volatile u16 *) (addr))
#define readl(addr) (*(volatile u32 *) (addr))
#define writew(b,addr) ((*(volatile u16 *) (addr)) = (b))
#define writel(b,addr) ((*(volatile u32 *) (addr)) = (b))
#else
#define readw(addr) in_le16((volatile u16 *)(addr))
#define readl(addr) in_le32((volatile u32 *)(addr))
#define writew(b,addr) out_le16((volatile u16 *)(addr),(b))
#define writel(b,addr) out_le32((volatile u32 *)(addr),(b))
#endif
...

Everything works great now, in fact so great that I blew away the RPX
utility with a jffs file system and rendered my board useless.  Has
anyone re-programmed the flash via BDM on these boards?  I wonder what
hardware and software works the best.

This solution doesn't explain why some of you haven't had this problem. 
Maybe the flash really is wired up two different ways on RPX boards...

Thanks a lot for everybody's help.  -T


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