Flash chip locking

[Kira Brown]

On Wed, 28 Jun 2000, Brendan Simon wrote:

> You are implying that 128us is a large amount of time to wait.  Maybe 
> with todays processors it is, I don't really know if it is or isn't for 
> the average processor speed.

On a 1GHz processor, sometimes we can do more than one instruction every
1nsec. 128usecs is an eternity.  (128usecs was long enough to do a
complete DRAM refresh on a 1MHz 6502...)

> Does the udelay() imply that the scheduler can switch to another process ?

Specifically it's there so that interrupts can happen so that bottom ends
can run;  scheduling isn't an issue.

kira.



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