Compile problems

David Woodhouse dwmw2 at
Mon Jun 26 02:45:54 EDT 2000

jgg at said:
>  BTW, I am almost finished redoing my JEDEC stuff to be more like your
> CFI stuff [turns out my SIMM was made in 1995, no CFI] and adding
> support for interleved and banked memories.. will send you a patch
> soon. 

Like my CFI stuff will be when I've finished it, I assume - not like it is 
at the moment - busy waiting and only detecting one chip in a mapping :)

I'm going to protect each chip with its own spinlock, and make erases 
asynchronous. I was hoping to do that last week, but it doesn't seem to 
have happened. Maybe this week.


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