Problems with cfi_cmdset_0001 && XIP kernel w/MTD working

[Shane Nay]

Problem solved, and MTD write, read, and erase is now functioning with an
XIP kernel.  Now come my questions..., I realized that it was trying to
fill the write buffer, but wasn't signaling the right size to the flash
chip now.  I traced where it was doing that, and have come to a conclusion
about a particular line of code.  But it might be a special case, and if so
we'll need some logic to deal with it, but I think it might just be a
mistake.  Okay, here it is:

In cfi_cmdset_001.c, in the do_write_buffer code, when it is sending the
size to the cmd_adr after putting the flash chip in write mode.  The
calculation for size there seems to be wrong for interleaved chips.  The
old code reads:
cfi_write(map,CMD((len/(cfi->device_type + CFIDEV_INTERLEAVE))-1),cmd_adr);

However, in my case, when it used this calculation, it undershot the number
of "words" it was going to write.  I think this is really confusing,
because the flash chip I'm working with percieves the number you send there
as "The number of times you will fill the bus".  But in the PDF it says
that that is the number of "words" that you will send it.  I suppose their
definition of word in this case is the present used buswidth of the chip. 
In any event, the correct code in my situation is:
cfi_write(map,CMD((len/(cfi->device_type)-1),cmd_adr);

The interleave should not factor into the division of the number of "words"
you are going to send.  I don't know if this is "generally true", but I
imagine it to be.  Anyone else out there with interleaved intel flashchips?

Thanks,
Shane.

(Ugh, replied to my own thread, bad juju)




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