mtd: spi-nor: enable stateless 4b op codes for mx25u25635f

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Gitweb:     http://git.infradead.org/?p=mtd-2.6.git;a=commit;h=b0fcb4b413028376894feaaaf62bcb09ab1b52f2
Commit:     b0fcb4b413028376894feaaaf62bcb09ab1b52f2
Parent:     835ed7bf12609ce23d42956e74206cc539a0ce5f
Author:     Mathias Kresin <dev at kresin.me>
AuthorDate: Thu Apr 13 09:23:54 2017 +0200
Committer:  Cyrille Pitchen <cyrille.pitchen at atmel.com>
CommitDate: Sun Apr 16 18:33:38 2017 +0200

    mtd: spi-nor: enable stateless 4b op codes for mx25u25635f
    
    All required stateless 4-byte op codes are supported by this flash
    chip. The stateless 4-byte support can't be autodetected due to a
    missing 4-byte Address Instruction Table in SFDP.
    
    Fixes hangs on reboot for SoCs expecting the flash chip in 3byte mode.
    
    Signed-off-by: Mathias Kresin <dev at kresin.me>
    Acked-by: Marek Vasut <marek.vasut at gmail.com>
    Signed-off-by: Cyrille Pitchen <cyrille.pitchen at atmel.com>
---
 drivers/mtd/spi-nor/spi-nor.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index 19b0b01..36684ca 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -1023,7 +1023,7 @@ static const struct flash_info spi_nor_ids[] = {
 	{ "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) },
 	{ "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) },
 	{ "mx25l25635e", INFO(0xc22019, 0, 64 * 1024, 512, 0) },
-	{ "mx25u25635f", INFO(0xc22539, 0, 64 * 1024, 512, SECT_4K) },
+	{ "mx25u25635f", INFO(0xc22539, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_4B_OPCODES) },
 	{ "mx25l25655e", INFO(0xc22619, 0, 64 * 1024, 512, 0) },
 	{ "mx66l51235l", INFO(0xc2201a, 0, 64 * 1024, 1024, SPI_NOR_QUAD_READ) },
 	{ "mx66l1g55g",  INFO(0xc2261b, 0, 64 * 1024, 2048, SPI_NOR_QUAD_READ) },