mtd: spi-nor: Disable chip erase for Micron n25q00.

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Gitweb:     http://git.infradead.org/?p=mtd-2.6.git;a=commit;h=193fb3c1127d0c0fbc5c5a6ba63a99083b775ffd
Commit:     193fb3c1127d0c0fbc5c5a6ba63a99083b775ffd
Parent:     2f5ad7f0f3e16772bafa692ad42b5af4dea292f6
Author:     mar.krzeminski <mar.krzeminski at gmail.com>
AuthorDate: Fri Jan 6 18:19:01 2017 +0100
Committer:  Cyrille Pitchen <cyrille.pitchen at atmel.com>
CommitDate: Wed Mar 22 21:56:50 2017 +0100

    mtd: spi-nor: Disable chip erase for Micron n25q00.
    
    Micron n25q00 are stacked chips, thus do not support chip erase.
    >From now spi-nor framework will not send chip erase command,
    instead will use sector at time erase procedure.
    
    Signed-off-by: Marcin Krzeminski <mar.krzeminski at gmail.com>
    Signed-off-by: Cyrille Pitchen <cyrille.pitchen at atmel.com>
---
 drivers/mtd/spi-nor/spi-nor.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index c29a351..32d1849 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -1036,8 +1036,8 @@ static const struct flash_info spi_nor_ids[] = {
 	{ "n25q256a",    INFO(0x20ba19, 0, 64 * 1024,  512, SECT_4K | SPI_NOR_QUAD_READ) },
 	{ "n25q512a",    INFO(0x20bb20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },
 	{ "n25q512ax3",  INFO(0x20ba20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },
-	{ "n25q00",      INFO(0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },
-	{ "n25q00a",     INFO(0x20bb21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },
+	{ "n25q00",      INFO(0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
+	{ "n25q00a",     INFO(0x20bb21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
 
 	/* PMC */
 	{ "pm25lv512",   INFO(0,        0, 32 * 1024,    2, SECT_4K_PMC) },