mtd: spi-nor: bindings for the Aspeed memory controllers

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Gitweb:     http://git.infradead.org/?p=mtd-2.6.git;a=commit;h=9e84609e8cdb4ce841cc2f9a217996a0b1198d29
Commit:     9e84609e8cdb4ce841cc2f9a217996a0b1198d29
Parent:     e56beebbc7341fd72251bd31580ca4e4e5164d0f
Author:     Cédric Le Goater <clg at kaod.org>
AuthorDate: Wed Dec 21 17:57:19 2016 +0100
Committer:  Cyrille Pitchen <cyrille.pitchen at atmel.com>
CommitDate: Fri Feb 10 13:54:54 2017 +0100

    mtd: spi-nor: bindings for the Aspeed memory controllers
    
    Signed-off-by: Cédric Le Goater <clg at kaod.org>
    Acked-by: Rob Herring <robh at kernel.org>
    Signed-off-by: Cyrille Pitchen <cyrille.pitchen at atmel.com>
---
 .../devicetree/bindings/mtd/aspeed-smc.txt         | 51 ++++++++++++++++++++++
 1 file changed, 51 insertions(+)

diff --git a/Documentation/devicetree/bindings/mtd/aspeed-smc.txt b/Documentation/devicetree/bindings/mtd/aspeed-smc.txt
new file mode 100644
index 0000000..49f6528
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/aspeed-smc.txt
@@ -0,0 +1,51 @@
+* Aspeed Firmware Memory controller
+* Aspeed SPI Flash Memory Controller
+
+The Firmware Memory Controller in the Aspeed AST2500 SoC supports
+three chip selects, two of which are always of SPI type and the third
+can be SPI or NOR type flash. These bindings only describe SPI.
+
+The two SPI flash memory controllers in the AST2500 each support two
+chip selects.
+
+Required properties:
+  - compatible : Should be one of
+	"aspeed,ast2400-fmc" for the AST2400 Firmware Memory Controller
+	"aspeed,ast2400-spi" for the AST2400 SPI Flash memory Controller
+	"aspeed,ast2500-fmc" for the AST2500 Firmware Memory Controller
+	"aspeed,ast2500-spi" for the AST2500 SPI flash memory controllers
+
+  - reg : the first contains the control register location and length,
+          the second contains the memory window mapping address and length
+  - #address-cells : must be 1 corresponding to chip select child binding
+  - #size-cells : must be 0 corresponding to chip select child binding
+
+Optional properties:
+  - interrupts : Should contain the interrupt for the dma device if an
+    FMC
+
+The child nodes are the SPI flash modules which must have a compatible
+property as specified in bindings/mtd/jedec,spi-nor.txt
+
+Optionally, the child node can contain properties for SPI mode (may be
+ignored):
+  - spi-max-frequency - max frequency of spi bus
+
+
+Example:
+fmc: fmc at 1e620000 {
+	compatible = "aspeed,ast2500-fmc";
+	reg = < 0x1e620000 0x94
+		0x20000000 0x02000000 >;
+	#address-cells = <1>;
+	#size-cells = <0>;
+	interrupts = <19>;
+	flash at 0 {
+		reg = < 0 >;
+		compatible = "jedec,spi-nor";
+		/* spi-max-frequency = <>; */
+		/* m25p,fast-read; */
+		#address-cells = <1>;
+		#size-cells = <1>;
+	};
+};