mtd: nand: atmel: Relax tADL_min constraint
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Fri Aug 25 14:59:01 PDT 2017
Gitweb: http://git.infradead.org/?p=mtd-2.6.git;a=commit;h=be3e83e3471cd0faff2c2d88fe9cfc73d9a9745a
Commit: be3e83e3471cd0faff2c2d88fe9cfc73d9a9745a
Parent: b974696da1cfc5aa0c29ed97dc8f6c239899e64b
Author: Boris Brezillon <boris.brezillon at free-electrons.com>
AuthorDate: Wed Aug 23 20:45:01 2017 +0200
Committer: Brian Norris <computersforpeace at gmail.com>
CommitDate: Thu Aug 24 20:59:50 2017 -0700
mtd: nand: atmel: Relax tADL_min constraint
Version 4 of the ONFI spec mandates that tADL be at least 400 nanoseconds,
but, depending on the master clock rate, 400 ns may not fit in the tADL
field of the SMC reg. We need to relax the check and accept the -ERANGE
return code.
Note that previous versions of the ONFI spec had a lower tADL_min (100 or
200 ns). It's not clear why this timing constraint got increased but it
seems most NANDs are fine with values lower than 400ns, so we should be
safe.
Fixes: f9ce2eddf176 ("mtd: nand: atmel: Add ->setup_data_interface() hooks")
Signed-off-by: Boris Brezillon <boris.brezillon at free-electrons.com>
Tested-by: Quentin Schulz <quentin.schulz at free-electrons.com>
Signed-off-by: Brian Norris <computersforpeace at gmail.com>
---
drivers/mtd/nand/atmel/nand-controller.c | 13 ++++++++++++-
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/atmel/nand-controller.c b/drivers/mtd/nand/atmel/nand-controller.c
index 2c8baa0..ceec21b 100644
--- a/drivers/mtd/nand/atmel/nand-controller.c
+++ b/drivers/mtd/nand/atmel/nand-controller.c
@@ -1364,7 +1364,18 @@ static int atmel_smc_nand_prepare_smcconf(struct atmel_nand *nand,
ret = atmel_smc_cs_conf_set_timing(smcconf,
ATMEL_HSMC_TIMINGS_TADL_SHIFT,
ncycles);
- if (ret)
+ /*
+ * Version 4 of the ONFI spec mandates that tADL be at least 400
+ * nanoseconds, but, depending on the master clock rate, 400 ns may not
+ * fit in the tADL field of the SMC reg. We need to relax the check and
+ * accept the -ERANGE return code.
+ *
+ * Note that previous versions of the ONFI spec had a lower tADL_min
+ * (100 or 200 ns). It's not clear why this timing constraint got
+ * increased but it seems most NANDs are fine with values lower than
+ * 400ns, so we should be safe.
+ */
+ if (ret && ret != -ERANGE)
return ret;
ncycles = DIV_ROUND_UP(conf->timings.sdr.tAR_min, mckperiodps);
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