mtd: nand: fsmc: validate ECC setup by checking algorithm directly
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Mon May 23 21:59:24 PDT 2016
Gitweb: http://git.infradead.org/?p=mtd-2.6.git;a=commit;h=ef296dc947f6a9300a7fb5b696d1e1f543479e18
Commit: ef296dc947f6a9300a7fb5b696d1e1f543479e18
Parent: e9d4faed71d5a63fa0ef8fcfef559f67f8b85a22
Author: Rafał Miłecki <zajec5 at gmail.com>
AuthorDate: Sun Apr 17 22:53:04 2016 +0200
Committer: Boris Brezillon <boris.brezillon at free-electrons.com>
CommitDate: Thu May 5 23:52:05 2016 +0200
mtd: nand: fsmc: validate ECC setup by checking algorithm directly
NAND core sets ECC algorithm in algo field now and it should be
preferred over the mode field. This also prepares driver for dropping
NAND_ECC_SOFT_BCH.
Signed-off-by: Rafał Miłecki <zajec5 at gmail.com>
Signed-off-by: Boris Brezillon <boris.brezillon at free-electrons.com>
---
drivers/mtd/nand/fsmc_nand.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/nand/fsmc_nand.c b/drivers/mtd/nand/fsmc_nand.c
index 1372040..0f8c63f 100644
--- a/drivers/mtd/nand/fsmc_nand.c
+++ b/drivers/mtd/nand/fsmc_nand.c
@@ -958,9 +958,12 @@ static int __init fsmc_nand_probe(struct platform_device *pdev)
nand->ecc.strength = 1;
break;
+ case NAND_ECC_SOFT:
case NAND_ECC_SOFT_BCH:
- dev_info(&pdev->dev, "Using 4-bit SW BCH ECC scheme\n");
- break;
+ if (nand->ecc.algo == NAND_ECC_BCH) {
+ dev_info(&pdev->dev, "Using 4-bit SW BCH ECC scheme\n");
+ break;
+ }
default:
dev_err(&pdev->dev, "Unsupported ECC mode!\n");
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