mtd: nand: omap2: Start dma request before enabling prefetch

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Gitweb:     http://git.infradead.org/?p=mtd-2.6.git;a=commit;h=03d3a1df6da660999d8f14552ac4d875e94090a3
Commit:     03d3a1df6da660999d8f14552ac4d875e94090a3
Parent:     7778478501938e071d40eeadb5d7d01770ce799f
Author:     Cooper Jr., Franklin <fcooper at ti.com>
AuthorDate: Fri Apr 15 15:28:58 2016 -0500
Committer:  Boris Brezillon <boris.brezillon at free-electrons.com>
CommitDate: Thu May 5 23:52:01 2016 +0200

    mtd: nand: omap2: Start dma request before enabling prefetch
    
    The prefetch engine sends a dma request once a FIFO threshold has
    been met. No other requests are received until the previous request
    is handled.
    
    Starting a dma transfer (dma_async_issue_pending) results in any
    previous event for the dma channel to be cleared. Therefore, starting
    the prefetch engine before initiating the dma transfer may result in
    the prefetch triggering a dma request but instead of it being handled
    it can end up being cleared. This will result in a hang since the code
    will continue to wait for the dma request to complete.
    
    By initiating the dma request before enabling the prefetch engine this
    race condition is avoided and no dma request are missed/cleared.
    
    Signed-off-by: Franklin S Cooper Jr <fcooper at ti.com>
    Signed-off-by: Boris Brezillon <boris.brezillon at free-electrons.com>
---
 drivers/mtd/nand/omap2.c | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index 141852f..d1496b1 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -503,6 +503,11 @@ static inline int omap_nand_dma_transfer(struct mtd_info *mtd, void *addr,
 	tx->callback_param = &info->comp;
 	dmaengine_submit(tx);
 
+	init_completion(&info->comp);
+
+	/* setup and start DMA using dma_addr */
+	dma_async_issue_pending(info->dma);
+
 	/*  configure and start prefetch transfer */
 	ret = omap_prefetch_enable(info->gpmc_cs,
 		PREFETCH_FIFOTHRESHOLD_MAX, 0x1, len, is_write, info);
@@ -510,10 +515,6 @@ static inline int omap_nand_dma_transfer(struct mtd_info *mtd, void *addr,
 		/* PFPW engine is busy, use cpu copy method */
 		goto out_copy_unmap;
 
-	init_completion(&info->comp);
-	dma_async_issue_pending(info->dma);
-
-	/* setup and start DMA using dma_addr */
 	wait_for_completion(&info->comp);
 	tim = 0;
 	limit = (loops_per_jiffy * msecs_to_jiffies(OMAP_NAND_TIMEOUT_MS));