mtd: spi-nor: support lock/unlock for a few Winbond chips

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Gitweb:     http://git.infradead.org/?p=mtd-2.6.git;a=commit;h=9648388fc7737365be7a8092e77df78ccc2cd1a4
Commit:     9648388fc7737365be7a8092e77df78ccc2cd1a4
Parent:     3dd8012a8eeb3702fa17450ec1a16a3f38af138d
Author:     Brian Norris <computersforpeace at gmail.com>
AuthorDate: Fri Jan 29 11:25:37 2016 -0800
Committer:  Brian Norris <computersforpeace at gmail.com>
CommitDate: Mon Mar 7 18:01:58 2016 -0800

    mtd: spi-nor: support lock/unlock for a few Winbond chips
    
    These are recent Winbond models that are known to have lock/unlock
    support via writing the Status Register, and that also support the TB
    (Top/Bottom) protection bit.
    
    Tested on w25q32dw.
    
    [Note on style: these entries are getting pretty long lines, so I picked
    a style that seems reasonable for splitting up the flags separate from
    the other mostly-similar fields.]
    
    Signed-off-by: Brian Norris <computersforpeace at gmail.com>
    Reviewed-by: Ezequiel Garcia <ezequiel at vanguardiasur.com.ar>
    Tested-by: Ezequiel Garcia <ezequiel at vanguardiasur.com.ar>
---
 drivers/mtd/spi-nor/spi-nor.c | 18 +++++++++++++++---
 1 file changed, 15 insertions(+), 3 deletions(-)

diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index 2aebf18..157841d 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -963,11 +963,23 @@ static const struct flash_info spi_nor_ids[] = {
 	{ "w25x16", INFO(0xef3015, 0, 64 * 1024,  32, SECT_4K) },
 	{ "w25x32", INFO(0xef3016, 0, 64 * 1024,  64, SECT_4K) },
 	{ "w25q32", INFO(0xef4016, 0, 64 * 1024,  64, SECT_4K) },
-	{ "w25q32dw", INFO(0xef6016, 0, 64 * 1024,  64, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+	{
+		"w25q32dw", INFO(0xef6016, 0, 64 * 1024,  64,
+			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+	},
 	{ "w25x64", INFO(0xef3017, 0, 64 * 1024, 128, SECT_4K) },
 	{ "w25q64", INFO(0xef4017, 0, 64 * 1024, 128, SECT_4K) },
-	{ "w25q64dw", INFO(0xef6017, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
-	{ "w25q128fw", INFO(0xef6018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+	{
+		"w25q64dw", INFO(0xef6017, 0, 64 * 1024, 128,
+			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+	},
+	{
+		"w25q128fw", INFO(0xef6018, 0, 64 * 1024, 256,
+			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+			SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
+	},
 	{ "w25q80", INFO(0xef5014, 0, 64 * 1024,  16, SECT_4K) },
 	{ "w25q80bl", INFO(0xef4014, 0, 64 * 1024,  16, SECT_4K) },
 	{ "w25q128", INFO(0xef4018, 0, 64 * 1024, 256, SECT_4K) },