doc: dt: atmel_nand: Reword the documentation

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Gitweb:     http://git.infradead.org/?p=mtd-2.6.git;a=commit;h=ec4ee5fb97f887bc334acc48307f3f30b6148336
Commit:     ec4ee5fb97f887bc334acc48307f3f30b6148336
Parent:     5ddc7bd43ccc77173f149483fa27a0b8f85e09e5
Author:     Romain Izard <romain.izard.pro at gmail.com>
AuthorDate: Wed Feb 10 10:56:24 2016 +0100
Committer:  Brian Norris <computersforpeace at gmail.com>
CommitDate: Fri Feb 12 10:27:46 2016 -0800

    doc: dt: atmel_nand: Reword the documentation
    
    Do not mention which chips supporting the PMECC controller, as it a
    duplicate of the information in the chips' device trees.
    
    Use common terms when describing the sub-node for the NAND Flash
    controller.
    
    Acked-by: Rob Herring <robh at kernel.org>
    Reviewed-by: Boris Brezillon <boris.brezillon at free-electrons.com>
    Signed-off-by: Romain Izard <romain.izard.pro at gmail.com>
    Signed-off-by: Brian Norris <computersforpeace at gmail.com>
---
 .../devicetree/bindings/mtd/atmel-nand.txt         | 23 +++++++++++-----------
 1 file changed, 12 insertions(+), 11 deletions(-)

diff --git a/Documentation/devicetree/bindings/mtd/atmel-nand.txt b/Documentation/devicetree/bindings/mtd/atmel-nand.txt
index 89b0db9..e68ab40 100644
--- a/Documentation/devicetree/bindings/mtd/atmel-nand.txt
+++ b/Documentation/devicetree/bindings/mtd/atmel-nand.txt
@@ -21,8 +21,8 @@ Optional properties:
 - nand-ecc-mode : String, operation mode of the NAND ecc mode, soft by default.
   Supported values are: "none", "soft", "hw", "hw_syndrome", "hw_oob_first",
   "soft_bch".
-- atmel,has-pmecc : boolean to enable Programmable Multibit ECC hardware.
-  Only supported by at91sam9x5 or later sam9 product.
+- atmel,has-pmecc : boolean to enable Programmable Multibit ECC hardware,
+  capable of BCH encoding and decoding, on devices where it is present.
 - atmel,pmecc-cap : error correct capability for Programmable Multibit ECC
   Controller. Supported values are: 2, 4, 8, 12, 24.
 - atmel,pmecc-sector-size : sector size for ECC computation. Supported values
@@ -32,15 +32,16 @@ Optional properties:
   sector size 1024. If not specified, driver will build the table in runtime.
 - nand-bus-width : 8 or 16 bus width if not present 8
 - nand-on-flash-bbt: boolean to enable on flash bbt option if not present false
-- Nand Flash Controller(NFC) is a slave driver under Atmel nand flash
-  - Required properties:
-    - compatible : "atmel,sama5d3-nfc" or "atmel,sama5d4-nfc".
-    - reg : should specify the address and size used for NFC command registers,
-            NFC registers and NFC Sram. NFC Sram address and size can be absent
-            if don't want to use it.
-    - clocks: phandle to the peripheral clock
-  - Optional properties:
-    - atmel,write-by-sram: boolean to enable NFC write by sram.
+
+Nand Flash Controller(NFC) is an optional sub-node
+Required properties:
+- compatible : "atmel,sama5d3-nfc" or "atmel,sama5d4-nfc".
+- reg : should specify the address and size used for NFC command registers,
+        NFC registers and NFC SRAM. NFC SRAM address and size can be absent
+        if don't want to use it.
+- clocks: phandle to the peripheral clock
+Optional properties:
+- atmel,write-by-sram: boolean to enable NFC write by SRAM.
 
 Examples:
 nand0: nand at 40000000,0 {