mtd: nuc900_nand: read correct SMISR register

Linux-MTD Mailing List linux-mtd at lists.infradead.org
Thu Mar 24 11:59:01 PDT 2016


Gitweb:     http://git.infradead.org/?p=mtd-2.6.git;a=commit;h=f9bdbd6c46c8ce0bb95f5b708a4a4a4b6b9a5917
Commit:     f9bdbd6c46c8ce0bb95f5b708a4a4a4b6b9a5917
Parent:     92752d9974882e2e5384e92668f02a134f9c7463
Author:     Arnd Bergmann <arnd at arndb.de>
AuthorDate: Wed Jan 13 22:38:08 2016 +0100
Committer:  Brian Norris <computersforpeace at gmail.com>
CommitDate: Fri Jan 15 10:02:09 2016 -0800

    mtd: nuc900_nand: read correct SMISR register
    
    The nuc900_nand driver has always passed an incorrect register
    address in its nuc900_check_rb() function, which cannot possibly
    work, and in some configurations gives us a build warning:
    
    drivers/mtd/nand/nuc900_nand.c: In function 'nuc900_check_rb':
    drivers/mtd/nand/nuc900_nand.c:27:23: warning: passing argument 1 of '__raw_readl' makes pointer from integer without a cast [-Wint-conversion]
     #define REG_SMISR     0xac
    drivers/mtd/nand/nuc900_nand.c:118:20: note: in expansion of macro 'REG_SMISR'
      val = __raw_readl(REG_SMISR);
    
    This makes sure we actually read from the register rather than
    from (void *)0x000000ac in user space.
    
    I suspect nobody noticed this before because the nuc900_nand_devready()
    function never gets called, or nobody uses this driver on an upstream
    kernel. Possibly even both.
    
    Signed-off-by: Arnd Bergmann <arnd at arndb.de>
    Signed-off-by: Brian Norris <computersforpeace at gmail.com>
---
 drivers/mtd/nand/nuc900_nand.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mtd/nand/nuc900_nand.c b/drivers/mtd/nand/nuc900_nand.c
index 220ddfc..dbc5b57 100644
--- a/drivers/mtd/nand/nuc900_nand.c
+++ b/drivers/mtd/nand/nuc900_nand.c
@@ -113,7 +113,7 @@ static int nuc900_check_rb(struct nuc900_nand *nand)
 {
 	unsigned int val;
 	spin_lock(&nand->lock);
-	val = __raw_readl(REG_SMISR);
+	val = __raw_readl(nand->reg + REG_SMISR);
 	val &= READYBUSY;
 	spin_unlock(&nand->lock);
 



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