doc: dt: mtd: add documentation for Mediatek spi-nor controller
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Gitweb: http://git.infradead.org/?p=mtd-2.6.git;a=commit;h=bf9c37cb627a3f690e246d9326a4a94913771bbf
Commit: bf9c37cb627a3f690e246d9326a4a94913771bbf
Parent: d2fd05bb6769d53ab98a11b080b3fb889276049d
Author: Bayi Cheng <bayi.cheng at mediatek.com>
AuthorDate: Fri Nov 6 23:48:07 2015 +0800
Committer: Brian Norris <computersforpeace at gmail.com>
CommitDate: Wed Nov 11 12:37:53 2015 -0800
doc: dt: mtd: add documentation for Mediatek spi-nor controller
Add device tree binding documentation for serial flash with
Mediatek serial flash controller
Signed-off-by: Bayi Cheng <bayi.cheng at mediatek.com>
Acked-by: Rob Herring <robh at kernel.org>
[Brian: fixed up language]
Signed-off-by: Brian Norris <computersforpeace at gmail.com>
---
.../devicetree/bindings/mtd/mtk-quadspi.txt | 41 ++++++++++++++++++++++
1 file changed, 41 insertions(+)
diff --git a/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt
new file mode 100644
index 0000000..fb314f0
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/mtk-quadspi.txt
@@ -0,0 +1,41 @@
+* Serial NOR flash controller for MTK MT81xx (and similar)
+
+Required properties:
+- compatible: should be "mediatek,mt8173-nor";
+- reg: physical base address and length of the controller's register
+- clocks: the phandle of the clocks needed by the nor controller
+- clock-names: the names of the clocks
+ the clocks should be named "spi" and "sf". "spi" is used for spi bus,
+ and "sf" is used for controller, these are the clocks witch
+ hardware needs to enabling nor flash and nor flash controller.
+ See Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
+- #address-cells: should be <1>
+- #size-cells: should be <0>
+
+The SPI flash must be a child of the nor_flash node and must have a
+compatible property. Also see jedec,spi-nor.txt.
+
+Required properties:
+- compatible: May include a device-specific string consisting of the manufacturer
+ and name of the chip. Must also include "jedec,spi-nor" for any
+ SPI NOR flash that can be identified by the JEDEC READ ID opcode (0x9F).
+- reg : Chip-Select number
+
+Example:
+
+nor_flash: spi at 1100d000 {
+ compatible = "mediatek,mt8173-nor";
+ reg = <0 0x1100d000 0 0xe0>;
+ clocks = <&pericfg CLK_PERI_SPI>,
+ <&topckgen CLK_TOP_SPINFI_IFR_SEL>;
+ clock-names = "spi", "sf";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ flash at 0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ };
+};
+
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