mtd: brcmnand: Force 8bit mode before doing nand_scan_ident()

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Gitweb:     http://git.infradead.org/?p=mtd-2.6.git;a=commit;h=4d1ea982a9beb4e47bba41131973329e2a012b38
Commit:     4d1ea982a9beb4e47bba41131973329e2a012b38
Parent:     3f06d2a912b55c53e9efbd799f7205dbfe041029
Author:     Anup Patel <anup.patel at broadcom.com>
AuthorDate: Fri Oct 30 12:29:20 2015 +0530
Committer:  Brian Norris <computersforpeace at gmail.com>
CommitDate: Fri Oct 30 11:50:38 2015 -0700

    mtd: brcmnand: Force 8bit mode before doing nand_scan_ident()
    
    Just like other NAND controllers, the NAND READID command only works
    in 8bit mode for all versions of BRCMNAND controller.
    
    This patch forces 8bit mode for each NAND CS in brcmnand_init_cs()
    before doing nand_scan_ident() to ensure that BRCMNAND controller
    is in 8bit mode when NAND READID command is issued.
    
    Signed-off-by: Anup Patel <anup.patel at broadcom.com>
    Reviewed-by: Ray Jui <rjui at broadcom.com>
    Reviewed-by: Scott Branden <sbranden at broadcom.com>
    Signed-off-by: Brian Norris <computersforpeace at gmail.com>
---
 drivers/mtd/nand/brcmnand/brcmnand.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/mtd/nand/brcmnand/brcmnand.c b/drivers/mtd/nand/brcmnand/brcmnand.c
index 3bd31a60..12c6190 100644
--- a/drivers/mtd/nand/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/brcmnand/brcmnand.c
@@ -1913,6 +1913,7 @@ static int brcmnand_init_cs(struct brcmnand_host *host)
 	struct mtd_info *mtd;
 	struct nand_chip *chip;
 	int ret;
+	u16 cfg_offs;
 	struct mtd_part_parser_data ppdata = { .of_node = dn };
 
 	ret = of_property_read_u32(dn, "reg", &host->cs);
@@ -1955,6 +1956,15 @@ static int brcmnand_init_cs(struct brcmnand_host *host)
 
 	chip->controller = &ctrl->controller;
 
+	/*
+	 * The bootloader might have configured 16bit mode but
+	 * NAND READID command only works in 8bit mode. We force
+	 * 8bit mode here to ensure that NAND READID commands works.
+	 */
+	cfg_offs = brcmnand_cs_offset(ctrl, host->cs, BRCMNAND_CS_CFG);
+	nand_writereg(ctrl, cfg_offs,
+		      nand_readreg(ctrl, cfg_offs) & ~CFG_BUS_WIDTH);
+
 	if (nand_scan_ident(mtd, 1, NULL))
 		return -ENXIO;