Documentation: devicetree: fix spelling in pxa3xx-nand binding

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Gitweb:     http://git.infradead.org/?p=mtd-2.6.git;a=commit;h=0542e135fa8c56cd03c02d74089750ae9195eb22
Commit:     0542e135fa8c56cd03c02d74089750ae9195eb22
Parent:     7234bea69de200e2060d099685c4c674b556edc0
Author:     Brian Norris <computersforpeace at gmail.com>
AuthorDate: Sat Feb 28 01:25:17 2015 -0800
Committer:  Brian Norris <computersforpeace at gmail.com>
CommitDate: Tue Mar 24 14:21:26 2015 -0700

    Documentation: devicetree: fix spelling in pxa3xx-nand binding
    
    Signed-off-by: Brian Norris <computersforpeace at gmail.com>
---
 Documentation/devicetree/bindings/mtd/pxa3xx-nand.txt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/mtd/pxa3xx-nand.txt b/Documentation/devicetree/bindings/mtd/pxa3xx-nand.txt
index de8b517..4f833e3 100644
--- a/Documentation/devicetree/bindings/mtd/pxa3xx-nand.txt
+++ b/Documentation/devicetree/bindings/mtd/pxa3xx-nand.txt
@@ -14,7 +14,7 @@ Optional properties:
  - marvell,nand-enable-arbiter:	Set to enable the bus arbiter
  - marvell,nand-keep-config:	Set to keep the NAND controller config as set
 				by the bootloader
- - num-cs:			Number of chipselect lines to usw
+ - num-cs:			Number of chipselect lines to use
  - nand-on-flash-bbt: 		boolean to enable on flash bbt option if
 				not present false
  - nand-ecc-strength:           number of bits to correct per ECC step