mtd: pxa3xx_nand: make the driver work on big-endian systems

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Gitweb:     http://git.infradead.org/?p=mtd-2.6.git;a=commit;h=b7e460624f0f3c31150f3b09e75b0d009e22ba5f
Commit:     b7e460624f0f3c31150f3b09e75b0d009e22ba5f
Parent:     2913aae5f9eae2f857cdeff5388bb22d0751aa08
Author:     Thomas Petazzoni <thomas.petazzoni at free-electrons.com>
AuthorDate: Thu May 22 14:56:52 2014 +0200
Committer:  Brian Norris <computersforpeace at gmail.com>
CommitDate: Wed May 28 13:27:37 2014 -0700

    mtd: pxa3xx_nand: make the driver work on big-endian systems
    
    The pxa3xx_nand driver currently uses __raw_writel() and __raw_readl()
    to access I/O registers. However, those functions do not do any
    endianness swapping, which means that they won't work when the CPU
    runs in big-endian but the I/O registers are little endian, which is
    the common situation for ARM systems running big endian.
    
    Since __raw_writel() and __raw_readl() do not include any memory
    barriers and the pxa3xx_nand driver can only be compiled for ARM
    platforms, the closest I/o accessors functions that do endianess
    swapping are writel_relaxed() and readl_relaxed().
    
    This patch has been verified to work on Armada XP GP: without the
    patch, the NAND is not detected when the kernel runs big endian while
    it is properly detected when the kernel runs little endian. With the
    patch applied, the NAND is properly detected in both situations
    (little and big endian).
    
    Signed-off-by: Thomas Petazzoni <thomas.petazzoni at free-electrons.com>
    Cc: <stable at vger.kernel.org> # v3.13+
    Signed-off-by: Brian Norris <computersforpeace at gmail.com>
---
 drivers/mtd/nand/pxa3xx_nand.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index 2a9add0..96b0b1d 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -127,10 +127,10 @@
 
 /* macros for registers read/write */
 #define nand_writel(info, off, val)	\
-	__raw_writel((val), (info)->mmio_base + (off))
+	writel_relaxed((val), (info)->mmio_base + (off))
 
 #define nand_readl(info, off)		\
-	__raw_readl((info)->mmio_base + (off))
+	readl_relaxed((info)->mmio_base + (off))
 
 /* error code and state */
 enum {