mtd: m25p80: Set rx_nbits for Quad SPI transfers

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Gitweb:     http://git.infradead.org/?p=mtd-2.6.git;a=commit;h=464e906737d6eba2fe63e913e0df4306423b4f61
Commit:     464e906737d6eba2fe63e913e0df4306423b4f61
Parent:     d8d5d10d0f27d1975e71617efff941321a0dc142
Author:     Geert Uytterhoeven <geert+renesas at linux-m68k.org>
AuthorDate: Tue Jan 21 13:59:17 2014 +0100
Committer:  Brian Norris <computersforpeace at gmail.com>
CommitDate: Mon Jan 27 21:19:28 2014 -0800

    mtd: m25p80: Set rx_nbits for Quad SPI transfers
    
    When using the Quad Read opcode, SPI masters still use Single SPI
    transfers, as spi_transfer.rx_nbits defaults to SPI_NBITS_SINGLE.
    Use SPI_NBITS_QUAD to fix this.
    
    While an earlier version of commit 3487a63955c34ea508bcf4ca5131ddd953876e2d
    ("drivers: mtd: m25p80: add quad read support") did this correctly, it was
    forgotten in the version that got merged.
    
    Signed-off-by: Geert Uytterhoeven <geert+renesas at linux-m68k.org>
    Acked-by: Marek Vasut <marex at denx.de>
    Signed-off-by: Brian Norris <computersforpeace at gmail.com>
---
 drivers/mtd/devices/m25p80.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c
index 320c6a3..ad19139 100644
--- a/drivers/mtd/devices/m25p80.c
+++ b/drivers/mtd/devices/m25p80.c
@@ -489,6 +489,16 @@ static inline int m25p80_dummy_cycles_read(struct m25p *flash)
 	}
 }
 
+static inline unsigned int m25p80_rx_nbits(const struct m25p *flash)
+{
+	switch (flash->flash_read) {
+	case M25P80_QUAD:
+		return 4;
+	default:
+		return 0;
+	}
+}
+
 /*
  * Read an address range from the flash chip.  The address range
  * may be any size provided it is within the physical boundaries.
@@ -519,6 +529,7 @@ static int m25p80_read(struct mtd_info *mtd, loff_t from, size_t len,
 	spi_message_add_tail(&t[0], &m);
 
 	t[1].rx_buf = buf;
+	t[1].rx_nbits = m25p80_rx_nbits(flash);
 	t[1].len = len;
 	spi_message_add_tail(&t[1], &m);