mtd: nand: pxa3xx: Add support for 2048 bytes page size devices

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Gitweb:     http://git.infradead.org/?p=mtd-2.6.git;a=commit;h=3db227b64841383b0e3c00d02e7c84d363494281
Commit:     3db227b64841383b0e3c00d02e7c84d363494281
Parent:     7587f64d546d6a05dab0a7d1ac964e7ac12072f0
Author:     Rodolfo Giometti <giometti at linux.it>
AuthorDate: Mon Jan 13 15:35:38 2014 +0100
Committer:  Brian Norris <computersforpeace at gmail.com>
CommitDate: Mon Jan 20 11:20:47 2014 -0800

    mtd: nand: pxa3xx: Add support for 2048 bytes page size devices
    
    This commit adds support for devices with 2048B page sizes and
    4-bit ECC strength requirements. This is achieved by enabling the BCH
    ECC engine, which provides a higher strength: 16-bit over 2048 bytes.
    
    Additionally, add a proper ECC layout to model the controller's view
    of the device (where 'U' means unused and 'B' is the bad block marker):
    
     ----------------------------------------------------
     | 2048B data | B | B | 30B spare | 30B ECC | U | U |
     ----------------------------------------------------
    
    Signed-off-by: Rodolfo Giometti <giometti at linux.it>
    [Brian: updated with Ezequiel's patch description]
    Acked-by: Ezequiel Garcia <ezequiel.garcia at free-electrons.com>
    Signed-off-by: Brian Norris <computersforpeace at gmail.com>
---
 drivers/mtd/nand/pxa3xx_nand.c | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index 31aae53..2a7a0b2 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -286,6 +286,16 @@ static struct nand_bbt_descr bbt_mirror_descr = {
 	.pattern = bbt_mirror_pattern
 };
 
+static struct nand_ecclayout ecc_layout_2KB_bch4bit = {
+	.eccbytes = 32,
+	.eccpos = {
+		32, 33, 34, 35, 36, 37, 38, 39,
+		40, 41, 42, 43, 44, 45, 46, 47,
+		48, 49, 50, 51, 52, 53, 54, 55,
+		56, 57, 58, 59, 60, 61, 62, 63},
+	.oobfree = { {2, 30} }
+};
+
 static struct nand_ecclayout ecc_layout_4KB_bch4bit = {
 	.eccbytes = 64,
 	.eccpos = {
@@ -1360,6 +1370,17 @@ static int pxa_ecc_init(struct pxa3xx_nand_info *info,
 	 * Required ECC: 4-bit correction per 512 bytes
 	 * Select: 16-bit correction per 2048 bytes
 	 */
+	} else if (strength == 4 && ecc_stepsize == 512 && page_size == 2048) {
+		info->ecc_bch = 1;
+		info->chunk_size = 2048;
+		info->spare_size = 32;
+		info->ecc_size = 32;
+		ecc->mode = NAND_ECC_HW;
+		ecc->size = info->chunk_size;
+		ecc->layout = &ecc_layout_2KB_bch4bit;
+		ecc->strength = 16;
+		return 1;
+
 	} else if (strength == 4 && ecc_stepsize == 512 && page_size == 4096) {
 		info->ecc_bch = 1;
 		info->chunk_size = 2048;