mtd: atmel_nand: Disable subpage NAND write when using Atmel PMECC

Linux-MTD Mailing List linux-mtd at lists.infradead.org
Sat Apr 5 02:59:03 EDT 2014


Gitweb:     http://git.infradead.org/?p=mtd-2.6.git;a=commit;h=90445ff6241e2a13445310803e2efa606c61f276
Commit:     90445ff6241e2a13445310803e2efa606c61f276
Parent:     b8e2931d168724ca95d275f4f825636bff82a9e8
Author:     Herve Codina <Herve.CODINA at celad.com>
AuthorDate: Mon Mar 3 12:15:29 2014 +0100
Committer:  Brian Norris <computersforpeace at gmail.com>
CommitDate: Mon Mar 10 22:42:31 2014 -0700

    mtd: atmel_nand: Disable subpage NAND write when using Atmel PMECC
    
    Crash detected on sam5d35 and its pmecc nand ecc controller.
    
    The problem was a call to chip->ecc.hwctl from nand_write_subpage_hwecc
    (nand_base.c) when we write a sub page.
    chip->ecc.hwctl function is not set when we are using PMECC controller.
    As a workaround, set NAND_NO_SUBPAGE_WRITE for PMECC controller in
    order to disable sub page access in nand_write_page.
    
    Signed-off-by: Herve Codina <Herve.CODINA at celad.com>
    Acked-by: Josh Wu <josh.wu at atmel.com>
    Cc: stable at vger.kernel.org
    Signed-off-by: Brian Norris <computersforpeace at gmail.com>
---
 drivers/mtd/nand/atmel_nand.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
index 1f719e0..4ce181a 100644
--- a/drivers/mtd/nand/atmel_nand.c
+++ b/drivers/mtd/nand/atmel_nand.c
@@ -1220,6 +1220,7 @@ static int atmel_pmecc_nand_init_params(struct platform_device *pdev,
 		goto err;
 	}
 
+	nand_chip->options |= NAND_NO_SUBPAGE_WRITE;
 	nand_chip->ecc.read_page = atmel_nand_pmecc_read_page;
 	nand_chip->ecc.write_page = atmel_nand_pmecc_write_page;
 



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