mtd: m25p80: Fix 4 byte addressing mode for Micron devices.

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Gitweb:     http://git.infradead.org/?p=mtd-2.6.git;a=commit;h=2b468ef0e7959b703626b64c4d264ef822c9267a
Commit:     2b468ef0e7959b703626b64c4d264ef822c9267a
Parent:     5cb1327172281cadb7ee8c5fa294d7ac8e09b8db
Author:     Elie De Brauwer <eliedebrauwer at gmail.com>
AuthorDate: Tue Sep 17 19:48:22 2013 +0200
Committer:  David Woodhouse <David.Woodhouse at intel.com>
CommitDate: Fri Sep 27 05:56:22 2013 -0500

    mtd: m25p80: Fix 4 byte addressing mode for Micron devices.
    
    According to the datasheet for Micron n25q256a (N25Q256A13ESF40F) 4-byte
    addressing mode should be entered as follows:
    
    <quote>
    To enter or exit the 4-byte address mode, the WRITE ENABLE command
    must be executed to set the write enable latch bit to 1. (Note: The
    WRITE ENABLE command must NOT be executed on the N25Q256A83ESF40x and
    N25Q256A83E1240x devices.) S# must be driven LOW. The effect of the
    command is immediate; after the command has been executed, the write
    enable latch bit is cleared to 0.
    </quote>
    
    Micron's portable way to perform this for all types of Micron flash
    is to first issue a write enable, then switch the addressing mode
    followed by a write disable to avoid leaving the flash in a write-
    able state.
    
    Signed-off-by: Elie De Brauwer <eliedebrauwer at email.com>
    [Brian: reworked a bit]
    Signed-off-by: Brian Norris <computersforpeace at gmail.com>
    Signed-off-by: David Woodhouse <David.Woodhouse at intel.com>
---
 drivers/mtd/devices/m25p80.c | 17 +++++++++++++++--
 1 file changed, 15 insertions(+), 2 deletions(-)

diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c
index 26b14f9..6bc9618 100644
--- a/drivers/mtd/devices/m25p80.c
+++ b/drivers/mtd/devices/m25p80.c
@@ -168,12 +168,25 @@ static inline int write_disable(struct m25p *flash)
  */
 static inline int set_4byte(struct m25p *flash, u32 jedec_id, int enable)
 {
+	int status;
+	bool need_wren = false;
+
 	switch (JEDEC_MFR(jedec_id)) {
-	case CFI_MFR_MACRONIX:
 	case CFI_MFR_ST: /* Micron, actually */
+		/* Some Micron need WREN command; all will accept it */
+		need_wren = true;
+	case CFI_MFR_MACRONIX:
 	case 0xEF /* winbond */:
+		if (need_wren)
+			write_enable(flash);
+
 		flash->command[0] = enable ? OPCODE_EN4B : OPCODE_EX4B;
-		return spi_write(flash->spi, flash->command, 1);
+		status = spi_write(flash->spi, flash->command, 1);
+
+		if (need_wren)
+			write_disable(flash);
+
+		return status;
 	default:
 		/* Spansion style */
 		flash->command[0] = OPCODE_BRWR;