drm/i915: flush cursors harder

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Gitweb:     http://git.infradead.org/?p=mtd-2.6.git;a=commit;h=b2ea8ef559b4d94190009f3651b5b3ab7c05afd3
Commit:     b2ea8ef559b4d94190009f3651b5b3ab7c05afd3
Parent:     f69e515699d8e9b1c25dcfe1c4c6f435087495d2
Author:     Daniel Vetter <daniel.vetter at ffwll.ch>
AuthorDate: Mon Nov 4 08:13:45 2013 +0100
Committer:  Daniel Vetter <daniel.vetter at ffwll.ch>
CommitDate: Fri Nov 15 20:22:34 2013 +0100

    drm/i915: flush cursors harder
    
    Apparently they need the same treatment as primary planes. This fixes
    modesetting failures because of stuck cursors (!) on Thomas' i830M
    machine.
    
    I've figured while at it I'll also roll it out for the ivb 3 pipe
    version of this function. I didn't do this for i845/i865 since Bspec
    says the update mechanism works differently, and there's some
    additional rules about what can be updated in which order.
    
    Tested-by: Thomas Richter <thor at math.tu-berlin.de>
    Cc: stable at vger.kernel.org
    Cc:  Thomas Richter <thor at math.tu-berlin.de>
    Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
    Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
---
 drivers/gpu/drm/i915/intel_display.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 3cddd50..c9882e8 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -7184,7 +7184,9 @@ static void i9xx_update_cursor(struct drm_crtc *crtc, u32 base)
 		intel_crtc->cursor_visible = visible;
 	}
 	/* and commit changes on next vblank */
+	POSTING_READ(CURCNTR(pipe));
 	I915_WRITE(CURBASE(pipe), base);
+	POSTING_READ(CURBASE(pipe));
 }
 
 static void ivb_update_cursor(struct drm_crtc *crtc, u32 base)
@@ -7213,7 +7215,9 @@ static void ivb_update_cursor(struct drm_crtc *crtc, u32 base)
 		intel_crtc->cursor_visible = visible;
 	}
 	/* and commit changes on next vblank */
+	POSTING_READ(CURCNTR_IVB(pipe));
 	I915_WRITE(CURBASE_IVB(pipe), base);
+	POSTING_READ(CURBASE_IVB(pipe));
 }
 
 /* If no-part of the cursor is visible on the framebuffer, then the GPU may hang... */