mtd: jedec_probe: fix LH28F640BF definition

Linux-MTD Mailing List linux-mtd at lists.infradead.org
Mon Aug 5 16:59:06 EDT 2013


Gitweb:     http://git.infradead.org/?p=mtd-2.6.git;a=commit;h=fe2f4c8e0bf2756b670ee78fa9772613a2ea8495
Commit:     fe2f4c8e0bf2756b670ee78fa9772613a2ea8495
Parent:     edc9cba495680a8a4968ed204b5c9f61a991bf4f
Author:     Andrea Adami <andrea.adami at gmail.com>
AuthorDate: Sun Jul 21 01:07:33 2013 +0200
Committer:  David Woodhouse <David.Woodhouse at intel.com>
CommitDate: Mon Aug 5 21:04:17 2013 +0100

    mtd: jedec_probe: fix LH28F640BF definition
    
    Zaurus 5500 contains 2 LH28F640BFHE-PTTL90 (64M 4Mx16) and
    the LH28F640BFHE-PTTL90.pdf datasheet available on the net shows
    the exact erasesize and the OTP support.
    At the moment only jedec_probe can discover the chip and
    the NOR is mounted read only probably because of wrong vpp.
    
    Signed-off-by: Andrea Adami <andrea.adami at gmail.com>
    Signed-off-by: Artem Bityutskiy <artem.bityutskiy at linux.intel.com>
    Signed-off-by: David Woodhouse <David.Woodhouse at intel.com>
---
 drivers/mtd/chips/jedec_probe.c | 13 +++++++------
 1 file changed, 7 insertions(+), 6 deletions(-)

diff --git a/drivers/mtd/chips/jedec_probe.c b/drivers/mtd/chips/jedec_probe.c
index c443f52..7c0b27d 100644
--- a/drivers/mtd/chips/jedec_probe.c
+++ b/drivers/mtd/chips/jedec_probe.c
@@ -120,7 +120,7 @@
 #define PM49FL008	0x006A
 
 /* Sharp */
-#define LH28F640BF	0x00b0
+#define LH28F640BF	0x00B0
 
 /* ST - www.st.com */
 #define M29F800AB	0x0058
@@ -1299,13 +1299,14 @@ static const struct amd_flash_info jedec_table[] = {
 		.mfr_id		= CFI_MFR_SHARP,
 		.dev_id		= LH28F640BF,
 		.name		= "LH28F640BF",
-		.devtypes	= CFI_DEVICETYPE_X8,
+		.devtypes	= CFI_DEVICETYPE_X16,
 		.uaddr		= MTD_UADDR_UNNECESSARY,
-		.dev_size	= SIZE_4MiB,
-		.cmd_set	= P_ID_INTEL_STD,
-		.nr_regions	= 1,
+		.dev_size	= SIZE_8MiB,
+		.cmd_set	= P_ID_INTEL_EXT,
+		.nr_regions	= 2,
 		.regions	= {
-			ERASEINFO(0x40000,16),
+			ERASEINFO(0x10000, 127),
+			ERASEINFO(0x02000, 8),
 		}
 	}, {
 		.mfr_id		= CFI_MFR_SST,



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