mtd: nand/fsmc: Read only 512 + 13 bytes for 8bit NAND devices

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Gitweb:     http://git.infradead.org/?p=mtd-2.6.git;a=commit;h=aea686b47c0cf97e0c6941799b523b6df87fc234
Commit:     aea686b47c0cf97e0c6941799b523b6df87fc234
Parent:     4cbe1bf07a4dfc3ec2d81c4e8aee832384997bc4
Author:     Vipin Kumar <vipin.kumar at st.com>
AuthorDate: Wed Mar 14 11:47:10 2012 +0530
Committer:  David Woodhouse <David.Woodhouse at intel.com>
CommitDate: Tue Mar 27 00:58:25 2012 +0100

    mtd: nand/fsmc: Read only 512 + 13 bytes for 8bit NAND devices
    
    The ECC logic of FSMC works on 512 bytes data + 13 bytes ECC to generate error
    indices of up to 8 incorrect bits. The FSMC driver reads 14 instead of 13 oob
    bytes to accommodate for 16 bit device as well.
    
    Unfortunately, the internal ecc state machine gets corrupted for 8 bit devices
    reading 512 + 14 bytes of data resulting in error indices not getting reported.
    
    Fix this by reading 14 bytes only for 16 bit devices
    
    Signed-off-by: Vipin Kumar <vipin.kumar at st.com>
    Signed-off-by: Artem Bityutskiy <artem.bityutskiy at linux.intel.com>
    Signed-off-by: David Woodhouse <David.Woodhouse at intel.com>
---
 drivers/mtd/nand/fsmc_nand.c |    4 +++-
 1 files changed, 3 insertions(+), 1 deletions(-)

diff --git a/drivers/mtd/nand/fsmc_nand.c b/drivers/mtd/nand/fsmc_nand.c
index 902ba0d..bd42339 100644
--- a/drivers/mtd/nand/fsmc_nand.c
+++ b/drivers/mtd/nand/fsmc_nand.c
@@ -549,7 +549,9 @@ static int fsmc_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
 			 * to read at least 13 bytes even in case of 16 bit NAND
 			 * devices
 			 */
-			len = roundup(len, 2);
+			if (chip->options & NAND_BUSWIDTH_16)
+				len = roundup(len, 2);
+
 			chip->cmdfunc(mtd, NAND_CMD_READOOB, off, page);
 			chip->read_buf(mtd, oob + j, len);
 			j += len;