mtd: fsmc: Move ALE, CLE defines to their respective platform

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Gitweb:     http://git.infradead.org/?p=mtd-2.6.git;a=commit;h=02bfc4ebbd2532440fadd78076f3a51e0ae89f7f
Commit:     02bfc4ebbd2532440fadd78076f3a51e0ae89f7f
Parent:     b2acc92e144336dd29e30dc5d26439355be750b6
Author:     Shiraz Hashim <shiraz.hashim at st.com>
AuthorDate: Wed Mar 7 17:00:52 2012 +0530
Committer:  David Woodhouse <David.Woodhouse at intel.com>
CommitDate: Tue Mar 27 00:46:19 2012 +0100

    mtd: fsmc: Move ALE, CLE defines to their respective platform
    
    Address Latch Enable (ALE) and Command Latch Enable (CLE) defines are
    platform specific and were wrongly put in driver specific fsmc.h file.
    Move such defines to their respective platform.
    
    Also instead of relying on fsmc driver, pass ALE, CLE offsets explicitly
    from individual platform.
    
    Signed-off-by: Shiraz Hashim <shiraz.hashim at st.com>
    Signed-off-by: Artem Bityutskiy <artem.bityutskiy at linux.intel.com>
    Signed-off-by: David Woodhouse <David.Woodhouse at intel.com>
---
 arch/arm/mach-u300/core.c                   |    2 ++
 arch/arm/mach-u300/include/mach/u300-regs.h |    5 +++++
 include/linux/mtd/fsmc.h                    |   13 -------------
 3 files changed, 7 insertions(+), 13 deletions(-)

diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c
index b4c6926..9c3bafd 100644
--- a/arch/arm/mach-u300/core.c
+++ b/arch/arm/mach-u300/core.c
@@ -1574,6 +1574,8 @@ static struct fsmc_nand_platform_data nand_platform_data = {
 	.nr_partitions = ARRAY_SIZE(u300_partitions),
 	.options = NAND_SKIP_BBTSCAN,
 	.width = FSMC_NAND_BW8,
+	.ale_off = PLAT_NAND_ALE,
+	.cle_off = PLAT_NAND_CLE,
 };
 
 static struct platform_device nand_device = {
diff --git a/arch/arm/mach-u300/include/mach/u300-regs.h b/arch/arm/mach-u300/include/mach/u300-regs.h
index 035fdc9..b9701fb 100644
--- a/arch/arm/mach-u300/include/mach/u300-regs.h
+++ b/arch/arm/mach-u300/include/mach/u300-regs.h
@@ -30,6 +30,11 @@
 /* NFIF */
 #define U300_NAND_IF_PHYS_BASE		0x9f800000
 
+/* ALE, CLE offset for FSMC NAND */
+#define PLAT_NAND_CLE			(1 << 16)
+#define PLAT_NAND_ALE			(1 << 17)
+
+
 /* AHB Peripherals */
 #define U300_AHB_PER_PHYS_BASE		0xa0000000
 #define U300_AHB_PER_VIRT_BASE		0xff010000
diff --git a/include/linux/mtd/fsmc.h b/include/linux/mtd/fsmc.h
index 2cd655f..e877325 100644
--- a/include/linux/mtd/fsmc.h
+++ b/include/linux/mtd/fsmc.h
@@ -26,19 +26,6 @@
 #define FSMC_NAND_BW8		1
 #define FSMC_NAND_BW16		2
 
-/*
- * The placement of the Command Latch Enable (CLE) and
- * Address Latch Enable (ALE) is twisted around in the
- * SPEAR310 implementation.
- */
-#if defined(CONFIG_MACH_SPEAR310)
-#define PLAT_NAND_CLE		(1 << 17)
-#define PLAT_NAND_ALE		(1 << 16)
-#else
-#define PLAT_NAND_CLE		(1 << 16)
-#define PLAT_NAND_ALE		(1 << 17)
-#endif
-
 #define FSMC_MAX_NOR_BANKS	4
 #define FSMC_MAX_NAND_BANKS	4