mtd: OneNAND: S5PC110: Add timeout to prevent the endless loop

[Linux-MTD Mailing List]

Gitweb:     http://git.infradead.org/?p=mtd-2.6.git;a=commit;h=ebe8a642f50a0020bed317afcde1f9d2a9da429b
Commit:     ebe8a642f50a0020bed317afcde1f9d2a9da429b
Parent:     12a40a57f762f569f58a393437d8c13864db390a
Author:     Kyungmin Park <kyungmin.park at samsung.com>
AuthorDate: Mon Sep 27 16:25:17 2010 +0900
Committer:  David Woodhouse <David.Woodhouse at intel.com>
CommitDate: Mon Oct 25 00:50:09 2010 +0100

    mtd: OneNAND: S5PC110: Add timeout to prevent the endless loop
    
    There's no case timeout but add it for some H/W problem or
    wrong codes implementation
    
    Signed-off-by: Kyungmin Park <kyungmin.park at samsung.com>
    Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy at nokia.com>
    Signed-off-by: David Woodhouse <David.Woodhouse at intel.com>
---
 drivers/mtd/onenand/samsung.c |   11 ++++++++++-
 1 files changed, 10 insertions(+), 1 deletions(-)

diff --git a/drivers/mtd/onenand/samsung.c b/drivers/mtd/onenand/samsung.c
index 7913a92..b801280 100644
--- a/drivers/mtd/onenand/samsung.c
+++ b/drivers/mtd/onenand/samsung.c
@@ -535,6 +535,7 @@ static int s5pc110_dma_ops(void *dst, void *src, size_t count, int direction)
 {
 	void __iomem *base = onenand->dma_addr;
 	int status;
+	unsigned long timeout;
 
 	writel(src, base + S5PC110_DMA_SRC_ADDR);
 	writel(dst, base + S5PC110_DMA_DST_ADDR);
@@ -552,6 +553,13 @@ static int s5pc110_dma_ops(void *dst, void *src, size_t count, int direction)
 
 	writel(S5PC110_DMA_TRANS_CMD_TR, base + S5PC110_DMA_TRANS_CMD);
 
+	/*
+	 * There's no exact timeout values at Spec.
+	 * In real case it takes under 1 msec.
+	 * So 20 msecs are enough.
+	 */
+	timeout = jiffies + msecs_to_jiffies(20);
+
 	do {
 		status = readl(base + S5PC110_DMA_TRANS_STATUS);
 		if (status & S5PC110_DMA_TRANS_STATUS_TE) {
@@ -559,7 +567,8 @@ static int s5pc110_dma_ops(void *dst, void *src, size_t count, int direction)
 					base + S5PC110_DMA_TRANS_CMD);
 			return -EIO;
 		}
-	} while (!(status & S5PC110_DMA_TRANS_STATUS_TD));
+	} while (!(status & S5PC110_DMA_TRANS_STATUS_TD) &&
+		time_before(jiffies, timeout));
 
 	writel(S5PC110_DMA_TRANS_CMD_TDC, base + S5PC110_DMA_TRANS_CMD);