mtd: denali: Add multi connected NAND support

Linux-MTD Mailing List linux-mtd at lists.infradead.org
Fri Aug 6 12:00:14 EDT 2010


Gitweb:     http://git.infradead.org/?p=mtd-2.6.git;a=commit;h=08b9ab9996c7e582f86da319f43d2dcb8ff55993
Commit:     08b9ab9996c7e582f86da319f43d2dcb8ff55993
Parent:     db9a321049ead6424848b1040a714290d5df39d7
Author:     Chuanxiao Dong <chuanxiao.dong at intel.com>
AuthorDate: Fri Aug 6 18:19:09 2010 +0800
Committer:  David Woodhouse <David.Woodhouse at intel.com>
CommitDate: Fri Aug 6 16:30:26 2010 +0100

    mtd: denali: Add multi connected NAND support
    
    Signed-off-by: Chuanxiao Dong <chuanxiao.dong at intel.com>
    Signed-off-by: David Woodhouse <David.Woodhouse at intel.com>
---
 drivers/mtd/nand/denali.c |   22 +++++++++++++++++++++-
 drivers/mtd/nand/denali.h |    1 +
 2 files changed, 22 insertions(+), 1 deletions(-)

diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
index f20d1b1..1422edd 100644
--- a/drivers/mtd/nand/denali.c
+++ b/drivers/mtd/nand/denali.c
@@ -1677,6 +1677,25 @@ static int denali_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
 		goto failed_nand;
 	}
 
+	/* support for multi nand
+	 * MTD known nothing about multi nand,
+	 * so we should tell it the real pagesize
+	 * and anything necessery
+	 */
+	denali->devnum = ioread32(denali->flash_reg + DEVICES_CONNECTED);
+	denali->nand.chipsize <<= (denali->devnum - 1);
+	denali->nand.page_shift += (denali->devnum - 1);
+	denali->nand.pagemask = (denali->nand.chipsize >>
+						denali->nand.page_shift) - 1;
+	denali->nand.bbt_erase_shift += (denali->devnum - 1);
+	denali->nand.phys_erase_shift = denali->nand.bbt_erase_shift;
+	denali->nand.chip_shift += (denali->devnum - 1);
+	denali->mtd.writesize <<= (denali->devnum - 1);
+	denali->mtd.oobsize <<= (denali->devnum - 1);
+	denali->mtd.erasesize <<= (denali->devnum - 1);
+	denali->mtd.size = denali->nand.numchips * denali->nand.chipsize;
+	denali->bbtskipbytes *= denali->devnum;
+
 	/* second stage of the NAND scan
 	 * this stage requires information regarding ECC and
 	 * bad block management. */
@@ -1713,6 +1732,7 @@ static int denali_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
 		denali_write32(8, denali->flash_reg + ECC_CORRECTION);
 	}
 
+	denali->nand.ecc.bytes *= denali->devnum;
 	denali->nand.ecc.layout->eccbytes *=
 		denali->mtd.writesize / ECC_SECTOR_SIZE;
 	denali->nand.ecc.layout->oobfree[0].offset =
@@ -1738,7 +1758,7 @@ static int denali_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
 	denali->nand.ecc.hwctl = denali_ecc_hwctl;
 
 	/* override the default read operations */
-	denali->nand.ecc.size = denali->mtd.writesize;
+	denali->nand.ecc.size = ECC_SECTOR_SIZE * denali->devnum;
 	denali->nand.ecc.read_page = denali_read_page;
 	denali->nand.ecc.read_page_raw = denali_read_page_raw;
 	denali->nand.ecc.write_page = denali_write_page;
diff --git a/drivers/mtd/nand/denali.h b/drivers/mtd/nand/denali.h
index bdf5c2a..b680474 100644
--- a/drivers/mtd/nand/denali.h
+++ b/drivers/mtd/nand/denali.h
@@ -764,6 +764,7 @@ struct denali_nand_info {
 	int irq_debug_array[32];
 	int idx;
 
+	uint32_t devnum;	/* represent how many nands connected */
 	uint32_t fwblks; /* represent how many blocks FW used */
 	uint32_t totalblks;
 	uint32_t blksperchip;



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