mtd: nand_ids: add two entries for NAND chips

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Gitweb:     http://git.infradead.org/?p=mtd-2.6.git;a=commit;h=24cc7b8a2a48a5707637e918a51ea547efe24892
Commit:     24cc7b8a2a48a5707637e918a51ea547efe24892
Parent:     e2c848833c1835b6261e46836b2317fc9c3c2787
Author:     Brian Norris <norris at broadcom.com>
AuthorDate: Thu Jun 17 12:35:11 2010 -0700
Committer:  David Woodhouse <David.Woodhouse at intel.com>
CommitDate: Mon Aug 2 09:04:09 2010 +0100

    mtd: nand_ids: add two entries for NAND chips
    
    Included the basic size info for NAND chips with ID of 0xAD or
    0xD7. The first can be found in Hynix HY27SF161G2M, while the
    second can be found in Micron MT29F64G08 and the Samsung K9LBG08U0D
    (among others). Also, some 64 Gbit (or larger) chips identify as
    0xD7 because they contain multiple smaller 32 Gbit chips. I
    assume it's safe to classify these under the 32 Gbit listing.
    
    Signed-off-by: Brian Norris <norris at broadcom.com>
    Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy at nokia.com>
    Signed-off-by: David Woodhouse <David.Woodhouse at intel.com>
---
 drivers/mtd/nand/nand_ids.c |    4 ++++
 1 files changed, 4 insertions(+), 0 deletions(-)

diff --git a/drivers/mtd/nand/nand_ids.c b/drivers/mtd/nand/nand_ids.c
index 89907ed..a04b891 100644
--- a/drivers/mtd/nand/nand_ids.c
+++ b/drivers/mtd/nand/nand_ids.c
@@ -85,6 +85,7 @@ struct nand_flash_dev nand_flash_ids[] = {
 	{"NAND 128MiB 3,3V 8-bit",	0xD1, 0, 128, 0, LP_OPTIONS},
 	{"NAND 128MiB 1,8V 16-bit",	0xB1, 0, 128, 0, LP_OPTIONS16},
 	{"NAND 128MiB 3,3V 16-bit",	0xC1, 0, 128, 0, LP_OPTIONS16},
+	{"NAND 128MiB 1,8V 16-bit",     0xAD, 0, 128, 0, LP_OPTIONS16},
 
 	/* 2 Gigabit */
 	{"NAND 256MiB 1,8V 8-bit",	0xAA, 0, 256, 0, LP_OPTIONS},
@@ -110,6 +111,9 @@ struct nand_flash_dev nand_flash_ids[] = {
 	{"NAND 2GiB 1,8V 16-bit",	0xB5, 0, 2048, 0, LP_OPTIONS16},
 	{"NAND 2GiB 3,3V 16-bit",	0xC5, 0, 2048, 0, LP_OPTIONS16},
 
+	/* 32 Gigabit */
+	{"NAND 4GiB 3,3V 8-bit",	0xD7, 0, 4096, 0, LP_OPTIONS16},
+
 	/*
 	 * Renesas AND 1 Gigabit. Those chips do not support extended id and
 	 * have a strange page/block layout !  The chosen minimum erasesize is