mtd: eLBC NAND: increase bus timeout to maximum

[Linux-MTD Mailing List]

Gitweb:     http://git.infradead.org/?p=mtd-2.6.git;a=commit;h=b3a70f0bc32d1b70584bcaa6019fa4260b0da92e
Commit:     b3a70f0bc32d1b70584bcaa6019fa4260b0da92e
Parent:     54c69cc25064c1d333a12b5883aaa3bfa3041dee
Author:     Scott Wood <scottwood at freescale.com>
AuthorDate: Fri Nov 13 14:12:16 2009 -0600
Committer:  David Woodhouse <David.Woodhouse at intel.com>
CommitDate: Mon Nov 30 09:53:32 2009 +0000

    mtd: eLBC NAND: increase bus timeout to maximum
    
    When a NAND operation is in progress, all other localbus operations
    (including NOR flash) will have to wait for access to the bus.  However, the
    NAND operation may take longer to complete than the default timeout.  Thus,
    if NOR is accessed while a NAND operation is in progress, the NAND operation
    will fail.
    
    Signed-off-by: Scott Wood <scottwood at freescale.com>
    Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy at nokia.com>
    Signed-off-by: David Woodhouse <David.Woodhouse at intel.com>
---
 drivers/mtd/nand/fsl_elbc_nand.c |    7 +++++++
 1 files changed, 7 insertions(+), 0 deletions(-)

diff --git a/drivers/mtd/nand/fsl_elbc_nand.c b/drivers/mtd/nand/fsl_elbc_nand.c
index ddd37d2..58db278 100644
--- a/drivers/mtd/nand/fsl_elbc_nand.c
+++ b/drivers/mtd/nand/fsl_elbc_nand.c
@@ -946,6 +946,13 @@ static int __devinit fsl_elbc_ctrl_init(struct fsl_elbc_ctrl *ctrl)
 {
 	struct fsl_lbc_regs __iomem *lbc = ctrl->regs;
 
+	/*
+	 * NAND transactions can tie up the bus for a long time, so set the
+	 * bus timeout to max by clearing LBCR[BMT] (highest base counter
+	 * value) and setting LBCR[BMTPS] to the highest prescaler value.
+	 */
+	clrsetbits_be32(&lbc->lbcr, LBCR_BMT, 15);
+
 	/* clear event registers */
 	setbits32(&lbc->ltesr, LTESR_NAND_MASK);
 	out_be32(&lbc->lteatr, 0);