[MTD] [NAND] FSL-UPM: Add wait flags to support board/chip specific delays

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Gitweb:     http://git.infradead.org/?p=mtd-2.6.git;a=commit;h=ade92a636f15d7e5b92e2df22e8fcb6c7640cd4f
Commit:     ade92a636f15d7e5b92e2df22e8fcb6c7640cd4f
Parent:     b6e0e8c07754c8aefd6ff3536463fed5f71405a0
Author:     Wolfgang Grandegger <wg at grandegger.com>
AuthorDate: Mon Mar 30 12:02:43 2009 +0200
Committer:  David Woodhouse <David.Woodhouse at intel.com>
CommitDate: Mon Apr 6 07:17:59 2009 -0700

    [MTD] [NAND] FSL-UPM: Add wait flags to support board/chip specific delays
    
    The NAND flash on the TQM8548_BE modules requires a short delay after
    running the UPM pattern. The TQM8548_BE requires a further short delay
    after writing out a buffer. Normally the R/B pin should be checked, but
    it's not connected on the TQM8548_BE. The existing driver uses similar
    fixed delay points. To manage these extra delays in a more general way,
    I introduced the "fsl,ump-wait-flags" property allowing the board-
    specific driver to specify various types of extra delay.
    
    Signed-off-by: Wolfgang Grandegger <wg at grandegger.com>
    Acked-by: Anton Vorontsov <avorontsov at ru.mvista.com>
    Signed-off-by: David Woodhouse <David.Woodhouse at intel.com>
---
 drivers/mtd/nand/fsl_upm.c |   20 ++++++++++++++++++--
 1 files changed, 18 insertions(+), 2 deletions(-)

diff --git a/drivers/mtd/nand/fsl_upm.c b/drivers/mtd/nand/fsl_upm.c
index 430de6d..d120cd8 100644
--- a/drivers/mtd/nand/fsl_upm.c
+++ b/drivers/mtd/nand/fsl_upm.c
@@ -23,6 +23,10 @@
 #include <linux/io.h>
 #include <asm/fsl_lbc.h>
 
+#define FSL_UPM_WAIT_RUN_PATTERN  0x1
+#define FSL_UPM_WAIT_WRITE_BYTE   0x2
+#define FSL_UPM_WAIT_WRITE_BUFFER 0x4
+
 struct fsl_upm_nand {
 	struct device *dev;
 	struct mtd_info mtd;
@@ -41,6 +45,7 @@ struct fsl_upm_nand {
 	uint32_t mchip_count;
 	uint32_t mchip_number;
 	int chip_delay;
+	uint32_t wait_flags;
 };
 
 #define to_fsl_upm_nand(mtd) container_of(mtd, struct fsl_upm_nand, mtd)
@@ -96,7 +101,8 @@ static void fun_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
 		fun->mchip_offsets[fun->mchip_number];
 	fsl_upm_run_pattern(&fun->upm, chip->IO_ADDR_R, mar);
 
-	fun_wait_rnb(fun);
+	if (fun->wait_flags & FSL_UPM_WAIT_RUN_PATTERN)
+		fun_wait_rnb(fun);
 }
 
 static void fun_select_chip(struct mtd_info *mtd, int mchip_nr)
@@ -138,8 +144,11 @@ static void fun_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
 
 	for (i = 0; i < len; i++) {
 		out_8(fun->chip.IO_ADDR_W, buf[i]);
-		fun_wait_rnb(fun);
+		if (fun->wait_flags & FSL_UPM_WAIT_WRITE_BYTE)
+			fun_wait_rnb(fun);
 	}
+	if (fun->wait_flags & FSL_UPM_WAIT_WRITE_BUFFER)
+		fun_wait_rnb(fun);
 }
 
 static int __devinit fun_chip_init(struct fsl_upm_nand *fun,
@@ -285,6 +294,13 @@ static int __devinit fun_probe(struct of_device *ofdev,
 	else
 		fun->chip_delay = 50;
 
+	prop = of_get_property(ofdev->node, "fsl,upm-wait-flags", &size);
+	if (prop && size == sizeof(uint32_t))
+		fun->wait_flags = *prop;
+	else
+		fun->wait_flags = FSL_UPM_WAIT_RUN_PATTERN |
+				  FSL_UPM_WAIT_WRITE_BYTE;
+
 	fun->io_base = devm_ioremap_nocache(&ofdev->dev, io_res.start,
 					    io_res.end - io_res.start + 1);
 	if (!fun->io_base) {