[MTD] [NAND] pxa3xx_nand: allow to disable builtin flash-type table

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Gitweb:     http://git.infradead.org/?p=mtd-2.6.git;a=commit;h=80ebf20f34c30760cfba7b5e0a418241181d2cd9
Commit:     80ebf20f34c30760cfba7b5e0a418241181d2cd9
Parent:     c8ac3f818e1183eab8d08a41b01b6078c5df4b43
Author:     Enrico Scholz <enrico.scholz at sigma-chemnitz.de>
AuthorDate: Fri Aug 29 12:59:49 2008 +0200
Committer:  David Woodhouse <David.Woodhouse at intel.com>
CommitDate: Mon Sep 1 21:37:39 2008 +0100

    [MTD] [NAND] pxa3xx_nand: allow to disable builtin flash-type table
    
    This patch adds a MTD_NAND_PXA3xx_BUILTIN configuration variables which
    allows to disable usage of builtin flash-type table.  Not enabling this
    option saves some space in the generated driver.
    
    Signed-off-by: Enrico Scholz <enrico.scholz at sigma-chemnitz.de>
    Signed-off-by: David Woodhouse <David.Woodhouse at intel.com>
---
 drivers/mtd/nand/Kconfig       |    7 +++++++
 drivers/mtd/nand/pxa3xx_nand.c |    4 ++++
 2 files changed, 11 insertions(+), 0 deletions(-)

diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 8eb2b06..6eebe85 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -334,6 +334,13 @@ config MTD_NAND_PXA3xx
 	  This enables the driver for the NAND flash device found on
 	  PXA3xx processors
 
+config MTD_NAND_PXA3xx_BUILTIN
+	bool "Use builtin definitions for some NAND chips (deprecated)"
+	depends on MTD_NAND_PXA3xx
+	help
+	  This enables builtin definitions for some NAND chips. This
+	  is deprecated in favor of platform specific data.
+
 config MTD_NAND_CM_X270
 	tristate "Support for NAND Flash on CM-X270 modules"
 	depends on MTD_NAND && MACH_ARMCORE
diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index 1906aba..e492804 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -164,6 +164,7 @@ static int use_dma = 1;
 module_param(use_dma, bool, 0444);
 MODULE_PARM_DESC(use_dma, "enable DMA for data transfering to/from NAND HW");
 
+#ifdef CONFIG_MTD_NAND_PXA3xx_BUILTIN
 static struct pxa3xx_nand_cmdset smallpage_cmdset = {
 	.read1		= 0x0000,
 	.read2		= 0x0050,
@@ -275,6 +276,7 @@ static struct pxa3xx_nand_flash *builtin_flash_types[] = {
 	&micron1GbX16,
 	&stm2GbX16,
 };
+#endif /* CONFIG_MTD_NAND_PXA3xx_BUILTIN */
 
 #define NDTR0_tCH(c)	(min((c), 7) << 19)
 #define NDTR0_tCS(c)	(min((c), 7) << 16)
@@ -931,6 +933,7 @@ static int pxa3xx_nand_detect_flash(struct pxa3xx_nand_info *info,
 			return 0;
 	}
 
+#ifdef CONFIG_MTD_NAND_PXA3xx_BUILTIN
 	for (i = 0; i < ARRAY_SIZE(builtin_flash_types); i++) {
 
 		f = builtin_flash_types[i];
@@ -944,6 +947,7 @@ static int pxa3xx_nand_detect_flash(struct pxa3xx_nand_info *info,
 		if (id == f->chip_id)
 			return 0;
 	}
+#endif
 
 	return -ENODEV;
 }