mtd/kernel mapped.c,1.10,1.11 mixmem.c,1.8,1.9
gleixner at infradead.org
gleixner at infradead.org
Mon Nov 7 06:15:32 EST 2005
- Previous message: mtd/include/linux/mtd bbm.h, 1.1, 1.2 blktrans.h, 1.5, 1.6 cfi.h,
1.55, 1.56 compatmac.h, 1.79, 1.80 doc2000.h, 1.24,
1.25 flashchip.h, 1.17, 1.18 ftl.h, 1.6, 1.7 gen_probe.h, 1.3,
1.4 jedec.h, 1.3, 1.4 map.h, 1.53, 1.54 mtd.h, 1.60,
1.61 nand.h, 1.75, 1.76 onenand.h, 1.7, 1.8 partitions.h, 1.16,
1.17 physmap.h, 1.3, 1.4 pmc551.h, 1.5, 1.6 xip.h, 1.4, 1.5
- Next message: mtd/drivers/mtd/chips Kconfig, 1.17, 1.18 Makefile.common, 1.4,
1.5 amd_flash.c, 1.27, 1.28 cfi_cmdset_0001.c, 1.184,
1.185 cfi_cmdset_0002.c, 1.121, 1.122 cfi_cmdset_0020.c, 1.21,
1.22 cfi_probe.c, 1.83, 1.84 cfi_util.c, 1.9, 1.10 chipreg.c,
1.18, 1.19 fwh_lock.h, 1.3, 1.4 gen_probe.c, 1.23,
1.24 jedec.c, 1.23, 1.24 jedec_probe.c, 1.65,
1.66 map_absent.c, 1.5, 1.6 sharp.c, 1.15, 1.16
- Messages sorted by:
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Update of /home/cvs/mtd/kernel
In directory phoenix.infradead.org:/tmp/cvs-serv29274/kernel
Modified Files:
mapped.c mixmem.c
Log Message:
[MTD / JFFS2] Clean up trailing white spaces
Index: mapped.c
===================================================================
RCS file: /home/cvs/mtd/kernel/mapped.c,v
retrieving revision 1.10
retrieving revision 1.11
diff -u -r1.10 -r1.11
--- mapped.c 21 Nov 2000 08:43:04 -0000 1.10
+++ mapped.c 7 Nov 2005 11:14:57 -0000 1.11
@@ -4,12 +4,12 @@
Flash MTD Routines
- These routine support IDing and manipulating flash. Currently the
+ These routine support IDing and manipulating flash. Currently the
older JEDEC ID mechanism and a table is used for determining the
flash characterisitics, but it is trivial to add support for the
CFI specification:
http://www.pentium.com/design/flash/ in the technote section.
-
+
##################################################################### */
/*}}}*/
#include <linux/mtd/mapped.h>
@@ -21,7 +21,7 @@
#include <linux/sched.h>
#include <asm/io.h>
-struct JEDECTable mtd_JEDEC_table[] =
+struct JEDECTable mtd_JEDEC_table[] =
{{0x01AD,"AMD Am29F016",2*1024*1024,64*1024,MTD_CAP_NORFLASH},
{0x01D5,"AMD Am29F080",1*1024*1024,64*1024,MTD_CAP_NORFLASH},
{}};
@@ -29,9 +29,9 @@
// flash_setup - Setup the mapped_mtd_info structure for normal flash /*{{{*/
// ---------------------------------------------------------------------
/* There is a set of commands that flash manufactures follow for getting the
- JEDEC id, erasing and writing. So long as your flash device supports
+ JEDEC id, erasing and writing. So long as your flash device supports
getting the JEDEC ID in this (standard?) way it will be supported as flash,
- otherwise it is converted to ROM. Upon completion the structure is
+ otherwise it is converted to ROM. Upon completion the structure is
registered with the MTD layer */
int mtd_mapped_setup(struct mapped_mtd_info *map)
{
@@ -39,7 +39,7 @@
// Must define a page function to use the defaults!
if (map->page == 0)
return -1;
-
+
if (map->jedec_sense == 0)
map->jedec_sense = flash_jedec;
@@ -53,11 +53,11 @@
if (map->mtd.type == MTD_NORFLASH)
map->mtd.write = flash_write;
if (map->mtd.type == MTD_RAM)
- map->mtd.write = ram_write;
- }
+ map->mtd.write = ram_write;
+ }
if (map->mtd.read == 0)
- map->mtd.read = rom_read;
-
+ map->mtd.read = rom_read;
+
return add_mtd_device(&map->mtd);
}
/*}}}*/
@@ -81,28 +81,28 @@
parity ^= C & 1;
C >>= 1;
}
-
+
return parity == 1;
}
/*}}}*/
// SetJedec - Set the jedec information for a chip /*{{{*/
// ---------------------------------------------------------------------
-/* We track the configuration of each chip separately in the chip list,
- each chip can have a different type and configuration to allow for
+/* We track the configuration of each chip separately in the chip list,
+ each chip can have a different type and configuration to allow for
maximum flexability. */
void set_jedec(struct mapped_mtd_info *map,unsigned chip,unsigned char mfr,
unsigned char id)
{
unsigned long longID = (mfr << 8) + id;
unsigned int I;
-
+
map->mtd.type = MTD_NORFLASH;
map->mfr = mfr;
map->id = id;
// Locate the chip in the jedec table
for (I = 0; mtd_JEDEC_table[I].jedec != 0; I++)
- {
+ {
if (mtd_JEDEC_table[I].jedec == longID)
break;
}
@@ -114,18 +114,18 @@
map->mtd.type = MTD_ROM;
return;
}
-
+
// Setup the MTD from the JEDEC information
// map->mtd.size = mtd_JEDEC_table[I].size;
// map->mtd.erasesize = mtd_JEDEC_table[I].sectorsize;
// map->mtd.capabilities = mtd_JEDEC_table[I].capabilities;
// strncpy(map->mtd.part,mtd_JEDEC_table[I].name,sizeof(map->mtd.part)-1);
-
+
map->chips[chip].jedec = longID;
map->chips[chip].size = mtd_JEDEC_table[I].size;
map->chips[chip].sectorsize = mtd_JEDEC_table[I].sectorsize;
map->chips[chip].capabilities = mtd_JEDEC_table[I].capabilities;
- map->chips[chip].base = 0;
+ map->chips[chip].base = 0;
}
/*}}}*/
// isjedec - Check if reading from the memory location gives jedec #s /*{{{*/
@@ -134,10 +134,10 @@
int isjedec(unsigned long base)
{
// Test #1, JEDEC numbers are readable from 0x??00/0x??01
- if (readb(base + 0) != readb(base + 0x100) ||
+ if (readb(base + 0) != readb(base + 0x100) ||
readb(base + 1) != readb(base + 0x101))
return 0;
-
+
// Test #2 JEDEC numbers exhibit odd parity
if (checkparity(readb(base + 0)) == 0 || checkparity(readb(base + 1)) == 0)
return 0;
@@ -149,7 +149,7 @@
/* The mysterious jedec flash probe sequence writes a specific pattern of
bytes to the flash. This should be general enough to work with any MTD
structure that may contain a flash chip, but note that it will corrupt
- address 0x5555 on SRAM cards if the machine dies between the two
+ address 0x5555 on SRAM cards if the machine dies between the two
critical operations. */
int flash_jedec(struct mapped_mtd_info *map)
{
@@ -159,19 +159,19 @@
unsigned long baseaddr = 0;
unsigned chip = 0;
unsigned count;
-
+
// Who has a page size this small? :>
if (map->pagesize < 0x555)
return 1;
-
+
base = map->page(map,0);
-
+
// Wait for any write/erase operation to settle
OldVal = readb(base);
for (I = 0; OldVal != readb(base) && I < 10000; I++)
OldVal = readb(base);
-
- /* Check for sram by writing to it, the write also happens to be part
+
+ /* Check for sram by writing to it, the write also happens to be part
of the flash reset sequence.. */
OldVal = readb(base + 0x555);
writeb(OldVal,base + 0x555);
@@ -179,7 +179,7 @@
if (OldVal != readb(base + 0x555))
{
udelay(100);
-
+
// Set it back and make sure..
writeb(OldVal,base + 0x555);
if (OldVal == readb(base + 0x555))
@@ -187,10 +187,10 @@
map->mtd.type = MTD_RAM;
return 0;
}
-
+
writeb(0xF0,base + 0x555);
}
-
+
// Probe for chips
while (chip < sizeof(map->chips)/sizeof(map->chips[0]))
{
@@ -207,7 +207,7 @@
break;
base = map->page(map,baseaddr/map->pagesize);
}
-
+
// Send the sequence
writeb(0xAA,base + 0x555);
writeb(0x55,base + 0x2AA);
@@ -224,12 +224,12 @@
return 0;
}
break;
- }
-
+ }
+
// Store the jdec info
set_jedec(map,chip,readb(base + 0),readb(base + 1));
map->chips[chip].base = baseaddr;
-
+
// Jump to the next chip
baseaddr += map->chips[chip].size;
if (baseaddr/map->pagesize > map->maxsize)
@@ -237,7 +237,7 @@
base = map->page(map,baseaddr/map->pagesize);
if (base == 0)
return -EIO;
-
+
chip++;
}
@@ -252,12 +252,12 @@
if (map->mtd.erasesize < map->chips[I].sectorsize)
map->mtd.erasesize = map->chips[I].sectorsize;
map->mtd.flags &= map->chips[I].capabilities;
-
+
base = map->page(map,baseaddr/map->pagesize);
baseaddr += map->chips[chip].size;
- writeb(0xF0,base + 0); // Reset
- }
-
+ writeb(0xF0,base + 0); // Reset
+ }
+
/* Generate a part name that includes the number of different chips and
other configuration information */
count = 1;
@@ -270,17 +270,17 @@
count++;
continue;
}
-
+
// Locate the chip in the jedec table
for (J = 0; mtd_JEDEC_table[J].jedec != 0; J++)
- {
+ {
if (mtd_JEDEC_table[J].jedec == map->chips[I].jedec)
break;
}
-
+
if (map->part[0] != 0)
strcat(map->part,",");
-
+
if (count != 1)
sprintf(map->part+strlen(map->part),"%u*[%s]",count,
mtd_JEDEC_table[J].name);
@@ -288,14 +288,14 @@
sprintf(map->part+strlen(map->part),"%s",
mtd_JEDEC_table[J].name);
count = 1;
- }
+ }
return 0;
}
/*}}}*/
// flash_failed - Print a console message about why the failure /*{{{*/
// ---------------------------------------------------------------------
-/* Pass the flags value that the flash return before it re-entered read
+/* Pass the flags value that the flash return before it re-entered read
mode. */
static void flash_failed(unsigned char code)
{
@@ -311,10 +311,10 @@
/*}}}*/
// flash_erase - Generic erase function /*{{{*/
// ---------------------------------------------------------------------
-/* This uses the erasure function described in the AMD Flash Handbook,
+/* This uses the erasure function described in the AMD Flash Handbook,
it will work for flashes with a fixed sector size only. Flashes with
a selection of sector sizes (ie the AMD Am29F800B) will need a different
- routine. This routine tries to parallize erasing multiple chips/sectors
+ routine. This routine tries to parallize erasing multiple chips/sectors
where possible */
int flash_erase(struct mtd_info *mtd, struct erase_info *instr)
{
@@ -330,7 +330,7 @@
(len % map->mtd.erasesize) != 0 ||
(len/map->mtd.erasesize) == 0)
return -EINVAL;
-
+
flash_chip_scan(map,start,len);
// Start the erase sequence on each chip
@@ -340,13 +340,13 @@
struct flash_chip *chip = map->chips + I;
unsigned long base;
unsigned long flags;
-
+
if (chip->length == 0)
continue;
-
+
if (page_jump(map,chip->base + chip->start,0x555,&base,0) != 0)
return -EIO;
-
+
// Send the erase setup code
writeb(0xF0,base + 0x555);
writeb(0xAA,base + 0x555);
@@ -361,9 +361,9 @@
writeb(0x10,base+0x555);
continue;
}
-
- /* Once we start selecting the erase sectors the delay between each
- command must not exceed 50us or it will immediately start erasing
+
+ /* Once we start selecting the erase sectors the delay between each
+ command must not exceed 50us or it will immediately start erasing
and ignore the other sectors */
save_flags(flags);
cli();
@@ -371,23 +371,23 @@
{
if (page_jump(map,chip->base + chip->start + off,1,&base,0) != 0)
return -EIO;
-
+
// Check to make sure we didn't timeout
writeb(0x30,base);
if ((readb(base) & (1 << 3)) != 0)
{
printk("mtd: Ack! We timed out the erase timer!\n");
return -EIO;
- }
+ }
}
restore_flags(flags);
- }
+ }
/* We could split this into a timer routine and return early, performing
background erasure.. Maybe later if the need warrents */
-
+
/* Poll the flash for erasure completion, specs say this can take as long
- as 480 seconds to do all the sectors (for a 2 meg flash).
+ as 480 seconds to do all the sectors (for a 2 meg flash).
Erasure time is dependant on chip age, temp and wear.. */
Time = 0;
NoTime = 0;
@@ -398,58 +398,58 @@
unsigned long off = 0;
if (chip->length == 0)
continue;
-
+
if (page_jump(map,chip->base + chip->start,1,&base,0) != 0)
return -EIO;
-
+
while (1)
{
unsigned char Last[4];
unsigned long Count = 0;
-
+
/* During erase bit 7 is held low and bit 6 toggles, we watch this,
should it stop toggling or go high then the erase is completed,
or this is not really flash ;> */
Last[0] = readb(base);
Last[1] = readb(base);
Last[2] = readb(base);
- for (Count = 3; (Last[(Count - 1) % 4] & (1 << 7)) == 0 &&
+ for (Count = 3; (Last[(Count - 1) % 4] & (1 << 7)) == 0 &&
Last[(Count - 1) % 4] != Last[(Count - 2) % 4]; Count++)
{
if (NoTime == 0)
Time += HZ/10 - schedule_timeout(HZ/10);
NoTime = 0;
-
+
Last[Count % 4] = readb(base);
-
+
// Count time, max of 15s per sector (according to AMD)
if (Time > 15*len/mtd->erasesize*HZ)
{
printk("mtd: Flash Erase Timed out\n");
return -EIO;
- }
+ }
}
-
+
if (Last[(Count - 1) % 4] == Last[(Count - 2) % 4])
{
flash_failed(Last[(Count - 3) % 4]);
return -EIO;
}
-
+
// Skip to the next chip if we used chip erase
if (chip->length == chip->size)
off = chip->size;
else
off += chip->sectorsize;
-
+
if (off >= chip->length)
break;
if (page_jump(map,chip->base + chip->start + off,1,&base,0) != 0)
- return -EIO;
+ return -EIO;
NoTime = 1;
- }
+ }
}
-
+
// Paranoid verify of erasure
{
unsigned long base;
@@ -457,7 +457,7 @@
while (len > 0)
{
unsigned long step;
-
+
if (page_jump(map,start,len,&base,&buflen) != 0)
return -EIO;
start += buflen;
@@ -470,18 +470,18 @@
printk("mtd: Flash Erase didn't take %lu %lu %lu\n",buflen,len,start);
return -EIO;
}
- }
- }
- }
-
+ }
+ }
+ }
+
return 0;
}
#if 1
/*}}}*/
// flash_write - Generic writing function /*{{{*/
// ---------------------------------------------------------------------
-/* This could do parallel writes on multiple chips but doesnt, memory
- constraints make that infeasable. This should work with any sort of
+/* This could do parallel writes on multiple chips but doesnt, memory
+ constraints make that infeasable. This should work with any sort of
linear flash that is not interleved */
extern int flash_write(struct mtd_info *mtd, loff_t start, size_t len,
size_t *retlen, const u_char *buf)
@@ -492,7 +492,7 @@
DEBUG(MTD_DEBUG_LEVEL1,"\n");
if (start + len > mtd->size)
return -EIO;
-
+
while (len != 0)
{
// Compute the page offset and reposition
@@ -510,7 +510,7 @@
continue;
if (((~oldbyte) & *buf) != 0)
printk("mtd: warn: Trying to set a 0 to a 1\n");
-
+
// Write
writeb(0xAA,base + 0x555);
writeb(0x55,base + 0x2AA);
@@ -519,10 +519,10 @@
Last[0] = readb(base + off);
Last[1] = readb(base + off);
Last[2] = readb(base + off);
-
+
/* Wait for the flash to finish the operation. We store the last 4
status bytes that have been retrieved so we can determine why
- it failed. The toggle bits keep toggling when there is a
+ it failed. The toggle bits keep toggling when there is a
failure */
for (Count = 3; Last[(Count - 1) % 4] != Last[(Count - 2) % 4] &&
Count < 10000; Count++)
@@ -531,7 +531,7 @@
{
flash_failed(Last[(Count - 3) % 4]);
return -EIO;
- }
+ }
}
}
*retlen = len;
@@ -552,13 +552,13 @@
DEBUG(MTD_DEBUG_LEVEL1,"\n");
if (start + len > mtd->size)
return -EIO;
-
+
while (len != 0)
{
// Reposition..
if (page_jump(map,start,len,&base,&buflen) != 0)
return -EIO;
-
+
// Copy
memcpy_toio(base,buf,buflen);
len -= buflen;
@@ -583,13 +583,13 @@
printk("Rom_Read\n");
if (start + len > mtd->size)
return -EIO;
-
+
while (len != 0)
{
// Reposition..
if (page_jump(map,start,len,&base,&buflen) != 0)
return -EIO;
-
+
// Copy
memcpy_fromio(buf,base,buflen);
len -= buflen;
@@ -611,7 +611,7 @@
DEBUG(MTD_DEBUG_LEVEL1,"Page Jump\n");
if (start > map->mtd.size || start + len > map->mtd.size)
return -EINVAL;
-
+
*base = map->page(map,start/map->pagesize);
if (*base == 0)
return -EIO;
@@ -625,7 +625,7 @@
return -EIO;
return 0;
}
-
+
// Compute the buffer paramaters and return
if (len > map->pagesize - (start % map->pagesize))
*retlen = map->pagesize - (start % map->pagesize);
@@ -650,7 +650,7 @@
// Zero the records
for (I = 0; map->chips[I].jedec != 0; I++)
map->chips[I].start = map->chips[I].length = 0;
-
+
// Intesect our region with the chip structures
for (I = 0; map->chips[I].jedec != 0 && len != 0; I++)
{
Index: mixmem.c
===================================================================
RCS file: /home/cvs/mtd/kernel/mixmem.c,v
retrieving revision 1.8
retrieving revision 1.9
diff -u -r1.8 -r1.9
--- mixmem.c 14 Nov 2000 10:58:02 -0000 1.8
+++ mixmem.c 7 Nov 2005 11:14:57 -0000 1.9
@@ -1,8 +1,8 @@
-/*
- * mixmem - a block device driver for flash rom found on the
+/*
+ * mixmem - a block device driver for flash rom found on the
* piggyback board of the multi-purpose mixcom card
*
- * Author: Gergely Madarasz <gorgo at itc.hu>
+ * Author: Gergely Madarasz <gorgo at itc.hu>
*
* $Id$
*
@@ -53,26 +53,26 @@
writeb(0xf0, base);
save_flags(flags); cli();
-
+
prev=readw(base);
writeb(0xaa, base+0x555);
writeb(0x55, base+0x2AA);
writeb(0x90, base+0x555);
-
+
curr=readw(base);
-
+
restore_flags(flags);
writeb(0xf0, base);
return(prev==curr?0:curr);
}
-static int mixmem_probe(void)
+static int mixmem_probe(void)
{
int i;
int id;
int chip;
-
+
/* This should really check to see if the io ports are in use before
writing to them */
for(i=0;mixcom_ports[i]!=0;i++) {
@@ -82,22 +82,22 @@
break;
}
}
-
+
if(mixcom_ports[i]==0) {
printk("mixmem: no mixcom board found\n");
return -ENODEV;
}
-
+
if (check_region(mixcom_ports[i]+MIXCOM_PAGE_OFFSET, 2)) return -EAGAIN;
-
-
+
+
// What is the deal with first_block_offset?
for(i=0;mixmem_addrs[i]!=0;i++) {
chip=flash_probe(mixmem_addrs[i]+FIRST_BLOCK_OFFSET);
if(chip)break;
}
-
+
if(mixmem_addrs[i]==0) {
printk("mixmem: no flash available\n");
return -ENODEV;
@@ -119,18 +119,18 @@
//static int __init init_mixmem(void)
int __init init_mixmem(void)
-{
+{
if (mixmem_probe() != 0)
return -EAGAIN;
// Print out our little header..
printk("mixcom MTD IO:0x%lx MEM:0x%lx-0x%lx\n",base_io,base_addr,
base_addr+MIXMEM_PAGESIZE);
-
+
// Allocate some memory
SSD = (struct mapped_mtd_info *)kmalloc(sizeof(*SSD),GFP_KERNEL);
if (SSD == 0)
- return 0;
+ return 0;
memset(SSD,0,sizeof(*SSD));
// Setup the MTD structure
- Previous message: mtd/include/linux/mtd bbm.h, 1.1, 1.2 blktrans.h, 1.5, 1.6 cfi.h,
1.55, 1.56 compatmac.h, 1.79, 1.80 doc2000.h, 1.24,
1.25 flashchip.h, 1.17, 1.18 ftl.h, 1.6, 1.7 gen_probe.h, 1.3,
1.4 jedec.h, 1.3, 1.4 map.h, 1.53, 1.54 mtd.h, 1.60,
1.61 nand.h, 1.75, 1.76 onenand.h, 1.7, 1.8 partitions.h, 1.16,
1.17 physmap.h, 1.3, 1.4 pmc551.h, 1.5, 1.6 xip.h, 1.4, 1.5
- Next message: mtd/drivers/mtd/chips Kconfig, 1.17, 1.18 Makefile.common, 1.4,
1.5 amd_flash.c, 1.27, 1.28 cfi_cmdset_0001.c, 1.184,
1.185 cfi_cmdset_0002.c, 1.121, 1.122 cfi_cmdset_0020.c, 1.21,
1.22 cfi_probe.c, 1.83, 1.84 cfi_util.c, 1.9, 1.10 chipreg.c,
1.18, 1.19 fwh_lock.h, 1.3, 1.4 gen_probe.c, 1.23,
1.24 jedec.c, 1.23, 1.24 jedec_probe.c, 1.65,
1.66 map_absent.c, 1.5, 1.6 sharp.c, 1.15, 1.16
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