mtd/drivers/mtd/nand rtc_from4.c,1.2,1.3

[dmarlin at infradead.org]

Update of /home/cvs/mtd/drivers/mtd/nand
In directory phoenix.infradead.org:/tmp/cvs-serv9453/drivers/mtd/nand

Modified Files:
	rtc_from4.c 
Log Message:
Add type cast (and re-cast) to permit bit operations on variables of
  type '__iomem'.  Note: works on 2.4.x kernel build.
Correct kernel message level for init_rs error.


Index: rtc_from4.c
===================================================================
RCS file: /home/cvs/mtd/drivers/mtd/nand/rtc_from4.c,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -r1.2 -r1.3
--- rtc_from4.c	18 Sep 2004 09:10:34 -0000	1.2
+++ rtc_from4.c	20 Sep 2004 08:44:28 -0000	1.3
@@ -216,17 +216,17 @@
 	switch(cmd) {
 		
 	case NAND_CTL_SETCLE: 
-		this->IO_ADDR_W |= RTC_FROM4_CLE;
+		this->IO_ADDR_W = (void __iomem *)((unsigned long)this->IO_ADDR_W | RTC_FROM4_CLE);
 		break;
 	case NAND_CTL_CLRCLE: 
-		this->IO_ADDR_W &= ~RTC_FROM4_CLE;
+		this->IO_ADDR_W = (void __iomem *)((unsigned long)this->IO_ADDR_W & ~RTC_FROM4_CLE);
 		break;
 		
 	case NAND_CTL_SETALE:
-		this->IO_ADDR_W |= RTC_FROM4_ALE;
+		this->IO_ADDR_W = (void __iomem *)((unsigned long)this->IO_ADDR_W | RTC_FROM4_ALE);
 		break;
 	case NAND_CTL_CLRALE:
-		this->IO_ADDR_W &= ~RTC_FROM4_ALE;
+		this->IO_ADDR_W = (void __iomem *)((unsigned long)this->IO_ADDR_W & ~RTC_FROM4_ALE);
 		break;
 		
 	case NAND_CTL_SETNCE:
@@ -251,18 +251,18 @@
 {
         struct nand_chip *this = mtd->priv;
 
-	this->IO_ADDR_R &= ~RTC_FROM4_NAND_ADDR_MASK;
-	this->IO_ADDR_W &= ~RTC_FROM4_NAND_ADDR_MASK;
+	this->IO_ADDR_R = (void __iomem *)((unsigned long)this->IO_ADDR_R & ~RTC_FROM4_NAND_ADDR_MASK);
+	this->IO_ADDR_W = (void __iomem *)((unsigned long)this->IO_ADDR_W & ~RTC_FROM4_NAND_ADDR_MASK);
 
         switch(chip) {
 
         case 0:		/* select slot 3 chip */
-		this->IO_ADDR_R |= RTC_FROM4_NAND_ADDR_SLOT3;
-		this->IO_ADDR_W |= RTC_FROM4_NAND_ADDR_SLOT3;
+		this->IO_ADDR_R = (void __iomem *)((unsigned long)this->IO_ADDR_R | RTC_FROM4_NAND_ADDR_SLOT3);
+		this->IO_ADDR_W = (void __iomem *)((unsigned long)this->IO_ADDR_W | RTC_FROM4_NAND_ADDR_SLOT3);
                 break;
         case 1:		/* select slot 4 chip */
-		this->IO_ADDR_R |= RTC_FROM4_NAND_ADDR_SLOT4;
-		this->IO_ADDR_W |= RTC_FROM4_NAND_ADDR_SLOT4;
+		this->IO_ADDR_R = (void __iomem *)((unsigned long)this->IO_ADDR_R | RTC_FROM4_NAND_ADDR_SLOT4);
+		this->IO_ADDR_W = (void __iomem *)((unsigned long)this->IO_ADDR_W | RTC_FROM4_NAND_ADDR_SLOT4);
                 break;
 
         }
@@ -382,12 +382,14 @@
 
 	status = *((volatile unsigned short *)(rtc_from4_fio_base + RTC_FROM4_RS_ECC_CHK));
 
-	if (!(status & RTC_FROM4_RS_ECC_CHK_ERROR))
+	if (!(status & RTC_FROM4_RS_ECC_CHK_ERROR)) {
 		return 0;
+	}
 
 	/* Reverse bits and invert the codes */
-	for (i = 0; i < 8; i++)
+	for (i = 0; i < 8; i++) {
 		ecc[i] = revbits[ecc1[i]];
+	}
 
 	/* convert into 6 10bit parity fields */
 	rpar[0] =  ((uint16_t)ecc[0])               | (((uint16_t)ecc1[1] << 8) & 0x300);
@@ -400,11 +402,12 @@
 	/* Let the library code do its magic. 
 	 * Set the data inversion mask to 0xff, as the FPGA inverts data on read
 	 * except for the virtual bits 9 /10 which are tied low
-	*/
+	 */
 	res = decode_rs8 (rs_decoder, buf, rpar, 512, NULL, 0, NULL, 0xff);
-	if (res > 0)
+	if (res > 0) {
 		DEBUG (MTD_DEBUG_LEVEL0, "rtc_from4_correct_data: " 
 			"ECC corrected %d errors on read\n", res);
+	}
 
 	return res;
 }
@@ -504,7 +507,7 @@
 	 */
 	rs_decoder = init_rs (10, 0x409, 0, 1, 6);
 	if (!rs_decoder) {
-		printk (KERN_ERROR "Could not create a RS decoder\n");
+		printk (KERN_ERR "Could not create a RS decoder\n");
 		nand_release(rtc_from4_mtd);
 		kfree (rtc_from4_mtd);
 		return -ENOMEM;
@@ -530,8 +533,9 @@
 
 #ifdef RTC_FROM4_HWECC
 	/* Free the reed solomon resources */
-	if (rs_decoder)
+	if (rs_decoder) {
 		free_rs(rs_decoder);
+	}
 #endif
 }
 module_exit(rtc_from4_cleanup);