mtd/drivers/mtd/nand au1550nd.c,1.9,1.10
ppopov at infradead.org
ppopov at infradead.org
Sun Oct 31 18:48:36 EST 2004
Update of /home/cvs/mtd/drivers/mtd/nand
In directory phoenix.infradead.org:/tmp/cvs-serv22837/drivers/mtd/nand
Modified Files:
au1550nd.c
Log Message:
MEM_STNDCTL is write only. Reading it (probably reading garbage)
and writing it back caused problems accessing the flash, after the NOR
flash was previously accessed. Patch by Herbert Riedel.
Index: au1550nd.c
===================================================================
RCS file: /home/cvs/mtd/drivers/mtd/nand/au1550nd.c,v
retrieving revision 1.9
retrieving revision 1.10
diff -u -r1.9 -r1.10
--- au1550nd.c 20 Oct 2004 05:58:30 -0000 1.9
+++ au1550nd.c 31 Oct 2004 23:48:33 -0000 1.10
@@ -314,12 +314,12 @@
case NAND_CTL_SETNCE:
/* assert (force assert) chip enable */
- au_writel(au_readl(MEM_STNDCTL) | (1<<(4+NAND_CS)) , MEM_STNDCTL);
+ au_writel((1<<(4+NAND_CS)) , MEM_STNDCTL); break;
break;
case NAND_CTL_CLRNCE:
/* deassert chip enable */
- au_writel(au_readl(MEM_STNDCTL) & ~(1<<(4+NAND_CS)), MEM_STNDCTL);
+ au_writel(0, MEM_STNDCTL); break;
break;
}
@@ -365,10 +365,7 @@
/* MEM_STNDCTL: disable ints, disable nand boot */
- /* disable interrupts */
- au_writel(au_readl(MEM_STNDCTL) & ~(1<<8), MEM_STNDCTL);
- /* disable NAND boot */
- au_writel(au_readl(MEM_STNDCTL) & ~(1<<0), MEM_STNDCTL);
+ au_writel(0, MEM_STNDCTL);
#ifdef CONFIG_MIPS_PB1550
/* set gpio206 high */
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