mtd/include/linux/mtd nand.h,1.50,1.51
gleixner at infradead.org
gleixner at infradead.org
Fri May 28 07:15:33 EDT 2004
Update of /home/cvs/mtd/include/linux/mtd
In directory phoenix.infradead.org:/tmp/cvs-serv21080
Modified Files:
nand.h
Log Message:
More documentation changes. Signed-off-by: Thomas Gleixner <tglx at linutronix.de>
Index: nand.h
===================================================================
RCS file: /home/cvs/mtd/include/linux/mtd/nand.h,v
retrieving revision 1.50
retrieving revision 1.51
diff -u -r1.50 -r1.51
--- nand.h 26 May 2004 18:05:57 -0000 1.50
+++ nand.h 28 May 2004 11:15:31 -0000 1.51
@@ -78,13 +78,21 @@
/*
* Constants for hardware specific CLE/ALE/NCE function
*/
+/* Select the chip by setting nCE to low */
#define NAND_CTL_SETNCE 1
+/* Deselect the chip by setting nCE to high */
#define NAND_CTL_CLRNCE 2
+/* Select the command latch by setting CLE to high */
#define NAND_CTL_SETCLE 3
+/* Deselect the command latch by setting CLE to low */
#define NAND_CTL_CLRCLE 4
+/* Select the address latch by setting ALE to high */
#define NAND_CTL_SETALE 5
+/* Deselect the address latch by setting ALE to low */
#define NAND_CTL_CLRALE 6
+/* Set write protection by setting WP to high. Not used! */
#define NAND_CTL_SETWP 7
+/* Clear write protection by setting WP to low. Not used! */
#define NAND_CTL_CLRWP 8
/*
@@ -114,25 +122,27 @@
/*
* Constants for ECC_MODES
- *
- * NONE: No ECC
- * SOFT: Software ECC 3 byte ECC per 256 Byte data
- * HW3_256: Hardware ECC 3 byte ECC per 256 Byte data
- * HW3_512: Hardware ECC 3 byte ECC per 512 Byte data
- *
- *
-*/
+ */
+
+/* No ECC. Usage is not recommended ! */
#define NAND_ECC_NONE 0
+/* Software ECC 3 byte ECC per 256 Byte data */
#define NAND_ECC_SOFT 1
+/* Hardware ECC 3 byte ECC per 256 Byte data */
#define NAND_ECC_HW3_256 2
+/* Hardware ECC 3 byte ECC per 512 Byte data */
#define NAND_ECC_HW3_512 3
+/* Hardware ECC 3 byte ECC per 512 Byte data */
#define NAND_ECC_HW6_512 4
+/* Hardware ECC for DiskOnChip devices */
#define NAND_ECC_DISKONCHIP 5
/*
* Constants for Hardware ECC
*/
+/* Reset Hardware ECC for read */
#define NAND_ECC_READ 0
+/* Reset Hardware ECC for write */
#define NAND_ECC_WRITE 1
/* Option constants for bizarre disfunctionality and real
@@ -169,18 +179,19 @@
#define NAND_CHIPOPTIONS_MSK 0x0000ffff
/* Non chip related options */
-/* Call bad block table scan after chip scan */
-#define NAND_USE_BBT 0x00010000
/* Use a flash based bad block table. This option is passed to the
* default bad block table function. */
-#define NAND_USE_FLASH_BBT 0x00020000
+#define NAND_USE_FLASH_BBT 0x00010000
/* Options set by nand scan */
/* Nand scan has allocated oob_buf */
#define NAND_OOBBUF_ALLOC 0x40000000
/* Nand scan has allocated data_buf */
#define NAND_DATABUF_ALLOC 0x80000000
+
+
/*
+ * nand_state_t - chip states
* Enumeration for NAND flash chip state
*/
typedef enum {
@@ -193,54 +204,58 @@
} nand_state_t;
-/*
- * NAND Private Flash Chip Data
- *
- * Structure overview:
- *
- * IO_ADDR_R address to read the 8 I/O lines of the flash device
- * IO_ADDR_W address to write the 8 I/O lines of the flash device
- * read_byte read one byte from the chip
- * write_byte wrtie one byte to the chip
- * read_word read one word from the chip
- * write_word write one word to the chip
- * write_buf write data from the buffer to the chip
- * read_buf read data from the chip into the buffer
- * verify_buf verify buffer contents against the chip data
- * select_chip select chip nr
- * block_bad check, if the block is bad
- * block_markbad mark the block bad
- * hwcontrol hardwarespecific function for accesing control-lines
- * dev_ready hardwarespecific function for accesing device ready/busy line
- * waitfunc hardwarespecific function for wait on ready
- * calculate_ecc function for ecc calculation or readback from ecc hardware
- * correct_data function for ecc correction, matching to ecc generator (sw/hw)
- * enable_hwecc function to enable (reset) hardware ecc generator
- * erase_cmd erease command write function
- * scan_bbt function to scan bad block table
- * eccmod mode of ecc, see defines above
- * eccsize databytes used per ecc-calculation
- * chip_delay chip dependent delay for transfering data from array to read regs (tR)
- * chip_lock spinlock used to protect access to this structure and the chip
- * wq wait queue to sleep on if a NAND operation is in progress
- * state the current state of the NAND device
- * page_shift number of address bits in a page (column address bits)
- * erase_shift number of address bits in an eraseblock
- * data_buf internal buffer for one page + oob
- * oob_buf oob buffer for one eraseblock
- * oobdirty indicates that oob_buf must be reinitialized
- * data_poi pointer to a data buffer
- * options various chip options
- * badblockpos position of the bad block marker in the oob area
- * numchips number of physical chips
- * pagemask page number mask = number of (pages / chip) - 1
- * pagebuf holds the pagenumber which is currently in data_buf
- * autooob the default (auto)placement scheme
- * bbt bad block table pointer
- * bbt_td bad block table descriptor for flash lookup
- * bbt_md bad block table mirror descriptor
- * bbt_size chip size reserved for the bbt tables
- * priv pointer to private chip date
+/**
+ * struct nand_chip - NAND Private Flash Chip Data
+ * @IO_ADDR_R: [BOARDSPECIFIC] address to read the 8 I/O lines of the flash device
+ * @IO_ADDR_W: [BOARDSPECIFIC] address to write the 8 I/O lines of the flash device
+ * @read_byte: [REPLACEABLE] read one byte from the chip
+ * @write_byte: [REPLACEABLE] write one byte to the chip
+ * @read_word: [REPLACEABLE] read one word from the chip
+ * @write_word: [REPLACEABLE] write one word to the chip
+ * @write_buf: [REPLACEABLE] write data from the buffer to the chip
+ * @read_buf: [REPLACEABLE] read data from the chip into the buffer
+ * @verify_buf: [REPLACEABLE] verify buffer contents against the chip data
+ * @select_chip: [REPLACEABLE] select chip nr
+ * @block_bad: [REPLACEABLE] check, if the block is bad
+ * @block_markbad: [REPLACEABLE] mark the block bad
+ * @hwcontrol: [BOARDSPECIFIC] hardwarespecific function for accesing control-lines
+ * @dev_ready: [BOARDSPECIFIC] hardwarespecific function for accesing device ready/busy line
+ * If set to NULL no access to ready/busy is available and the ready/busy information
+ * is read from the chip status register
+ * @cmdfunc: [REPLACEABLE] hardwarespecific function for writing commands to the chip
+ * @waitfunc: [REPLACEABLE] hardwarespecific function for wait on ready
+ * @calculate_ecc: [REPLACEABLE] function for ecc calculation or readback from ecc hardware
+ * @correct_data: [REPLACEABLE] function for ecc correction, matching to ecc generator (sw/hw)
+ * @enable_hwecc: [BOARDSPECIFIC] function to enable (reset) hardware ecc generator. Must only
+ * be provided if a hardware ECC is available
+ * @erase_cmd: [INTERN] erase command write function, selectable due to AND support
+ * @scan_bbt: [REPLACEABLE] function to scan bad block table
+ * @eccmode: [BOARDSPECIFIC] mode of ecc, see defines
+ * @eccsize: [INTERN] databytes used per ecc-calculation
+ * @eccsteps: [INTERN] number of ecc calculation steps per page
+ * @chip_delay: [BOARDSPECIFIC] chip dependent delay for transfering data from array to read regs (tR)
+ * @chip_lock: [INTERN] spinlock used to protect access to this structure and the chip
+ * @wq: [INTERN] wait queue to sleep on if a NAND operation is in progress
+ * @state: [INTERN] the current state of the NAND device
+ * @page_shift: [INTERN] number of address bits in a page (column address bits)
+ * @erase_shift: [INTERN] number of address bits in an eraseblock
+ * @data_buf: [INTERN] internal buffer for one page + oob
+ * @oob_buf: [INTERN] oob buffer for one eraseblock
+ * @oobdirty: [INTERN] indicates that oob_buf must be reinitialized
+ * @data_poi: [INTERN] pointer to a data buffer
+ * @options: [BOARDSPECIFIC] various chip options. They can partly be set to inform nand_scan about
+ * special functionality. See the defines for further explanation
+ * @badblockpos: [INTERN] position of the bad block marker in the oob area
+ * @numchips: [INTERN] number of physical chips
+ * @chipsize: [INTERN] the size of one chip for multichip arrays
+ * @pagemask: [INTERN] page number mask = number of (pages / chip) - 1
+ * @pagebuf: [INTERN] holds the pagenumber which is currently in data_buf
+ * @autooob: [REPLACEABLE] the default (auto)placement scheme
+ * @bbt: [INTERN] bad block table pointer
+ * @bbt_td: [REPLACEABLE] bad block table descriptor for flash lookup
+ * @bbt_md: [REPLACEABLE] bad block table mirror descriptor
+ * @bbt_size: [INTERN] chip size reserved for the bbt tables
+ * @priv: [OPTIONAL] pointer to private chip date
*/
struct nand_chip {
@@ -304,20 +319,18 @@
#define NAND_MFR_RENESAS 0x07
#define NAND_MFR_STMICRO 0x20
-/*
- * NAND Flash Device ID Structure
+/**
+ * struct nand_flash_dev - NAND Flash Device ID Structure
*
- * Structure overview:
- *
- * name Identify the device type
- * id device ID code
- * pagesize Pagesize in bytes. Either 256 or 512 or 0
+ * @name: Identify the device type
+ * @id: device ID code
+ * @pagesize: Pagesize in bytes. Either 256 or 512 or 0
* If the pagesize is 0, then the real pagesize
* and the eraseize are determined from the
* extended id bytes in the chip
- * erasesize Size of an erase block in the flash device.
- * chipsize Total chipsize in Mega Bytes
- * options Bitfield to store chip relevant options
+ * @erasesize: Size of an erase block in the flash device.
+ * @chipsize: Total chipsize in Mega Bytes
+ * @options: Bitfield to store chip relevant options
*/
struct nand_flash_dev {
char *name;
@@ -328,10 +341,10 @@
unsigned long options;
};
-/*
- * NAND Flash Manufacturer ID Structure
- * name - Manufacturer name
- * id - manufacturer ID code of device.
+/**
+ * struct nand_manufacturers - NAND Flash Manufacturer ID Structure
+ * @name: Manufacturer name
+ * @id: manufacturer ID code of device.
*/
struct nand_manufacturers {
int id;
@@ -341,21 +354,27 @@
extern struct nand_flash_dev nand_flash_ids[];
extern struct nand_manufacturers nand_manuf_ids[];
-/* Descriptor for the bad block table marker and the descriptor for the
- * pattern which identifies good and bad blocks.
- *
- * options options for this descriptor
- * pages the page(s) where we find the bbt, used with option BBT_ABSPAGE
- * when bbt is searched, then we store the found bbts pages here
+/**
+ * struct nand_bbt_descr - bad block table descriptor
+ * @options: options for this descriptor
+ * @pages: the page(s) where we find the bbt, used with option BBT_ABSPAGE
+ * when bbt is searched, then we store the found bbts pages here.
* Its an array and supports up to 8 chips now
- * offs offset of the pattern in the oob area of the page
- * veroffs offset of the bbt version counter in the oob are of the page
- * version version read from the bbt page during scan
- * len length of the pattern, if 0 no pattern check is performed
- * maxblock maximum number of blocks to search for a bbt
- * pattern pattern to identify bad block table or factory marked good /
+ * @offs: offset of the pattern in the oob area of the page
+ * @veroffs: offset of the bbt version counter in the oob are of the page
+ * @version: version read from the bbt page during scan
+ * @len: length of the pattern, if 0 no pattern check is performed
+ * @maxblocks: maximum number of blocks to search for a bbt. This number of
+ * blocks is reserved at the end of the device where the tables are
+ * written.
+ * @pattern: pattern to identify bad block table or factory marked good /
* bad blocks, can be NULL, if len = 0
-*/
+ *
+ * Descriptor for the bad block table marker and the descriptor for the
+ * pattern which identifies good and bad blocks. The assumption is made
+ * that the pattern and the version count are always located in the oob area
+ * of the first block.
+ */
struct nand_bbt_descr {
int options;
int pages[NAND_MAX_CHIPS];
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