mtd/drivers/mtd/nand au1550nd.c,1.4,1.5

[ppopov at infradead.org]

Update of /home/cvs/mtd/drivers/mtd/nand
In directory phoenix.infradead.org:/tmp/cvs-serv24058

Modified Files:
	au1550nd.c 
Log Message:
Minor nand updates, by AMD.


Index: au1550nd.c
===================================================================
RCS file: /home/cvs/mtd/drivers/mtd/nand/au1550nd.c,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -r1.4 -r1.5
--- au1550nd.c	12 May 2004 06:23:58 -0000	1.4
+++ au1550nd.c	17 May 2004 07:19:35 -0000	1.5
@@ -20,7 +20,6 @@
 #include <asm/io.h>
 #include <asm/au1000.h>
 #ifdef CONFIG_MIPS_PB1550
-/* for timings, should be done by YAMON */
 #include <asm/pb1550.h> 
 #endif
 #ifdef CONFIG_MIPS_DB1550
@@ -29,7 +28,7 @@
 
 
 /*
- * MTD structure for Pb1550 board
+ * MTD structure for NAND controller
  */
 static struct mtd_info *au1550_mtd = NULL;
 static volatile u32 p_nand;
@@ -262,7 +261,7 @@
 	au1550_mtd = kmalloc (sizeof(struct mtd_info) + 
 			sizeof (struct nand_chip), GFP_KERNEL);
 	if (!au1550_mtd) {
-		printk ("Unable to allocate Pb1550 NAND MTD dev structure.\n");
+		printk ("Unable to allocate NAND MTD dev structure.\n");
 		return -ENOMEM;
 	}
 
@@ -279,6 +278,9 @@
 	/* disable interrupts */
 	au_writel(au_readl(MEM_STNDCTL) & ~(1<<8), MEM_STNDCTL);
 
+	/* disable NAND boot */
+	au_writel(au_readl(MEM_STNDCTL) & ~(1<<0), MEM_STNDCTL);
+
 #ifdef CONFIG_MIPS_PB1550
 	/* set gpio206 high */
 	au_writel(au_readl(GPIO2_DIR) & ~(1<<6), GPIO2_DIR);
@@ -309,6 +311,7 @@
 			return 1;
 	}
 
+	/* Configure RCE1 - should be done by YAMON */
 	au_writel(0x5 | (nand_width << 22), MEM_STCFG1);
 	au_writel(NAND_TIMING, MEM_STTIME1);
 	mem_time = au_readl(MEM_STTIME1);
@@ -323,10 +326,10 @@
 #endif
 
 #ifdef CONFIG_MIPS_DB1550
+	/* Configure RCE1 - should be done by YAMON */
 	au_writel(0x00400005, MEM_STCFG1);
 	au_writel(0x00007774, MEM_STTIME1);
 	au_writel(0x12000FFF, MEM_STADDR1);
-	au_sync();
 #endif
 
 	p_nand = (volatile struct nand_regs *)ioremap(NAND_PHYS_ADDR, 0x1000);