mtd/drivers/mtd/maps wr_sbc82xx_flash.c,1.4,1.5

[David Woodhouse]

Update of /home/cvs/mtd/drivers/mtd/maps
In directory phoenix.infradead.org:/tmp/cvs-serv5339/maps

Modified Files:
	wr_sbc82xx_flash.c 
Log Message:
update WR map driver to work on 85xx too

Index: wr_sbc82xx_flash.c
===================================================================
RCS file: /home/cvs/mtd/drivers/mtd/maps/wr_sbc82xx_flash.c,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -r1.4 -r1.5
--- wr_sbc82xx_flash.c	14 Jul 2004 12:55:42 -0000	1.4
+++ wr_sbc82xx_flash.c	15 Jul 2004 14:52:02 -0000	1.5
@@ -65,44 +65,50 @@
 
 static const char *part_probes[] __initdata = {"cmdlinepart", "RedBoot", NULL};
 
+#define init_sbc82xx_one_flash(map, br, or)			\
+do {								\
+	(map).phys = (br & 1) ? (br & 0xffff8000) : 0;		\
+	(map).size = (br & 1) ? (~(or & 0xffff8000) + 1) : 0;	\
+	switch (br & 0x00001800) {				\
+	case 0x00000000:					\
+	case 0x00000800:	(map).bankwidth = 1;	break;	\
+	case 0x00001000:	(map).bankwidth = 2;	break;	\
+	case 0x00001800:	(map).bankwidth = 4;	break;	\
+	}							\
+} while (0);
+
 int __init init_sbc82xx_flash(void)
 {
-	volatile  memctl_cpm2_t *mc = &cpm2_immr->im_memctl;
+	volatile memctl_cpm2_t *mc = &cpm2_immr->im_memctl;
 	int bigflash;
 	int i;
 
-	/* First, register the boot flash, whichever we're booting from */
-	if ((mc->memc_br0 & 0x00001800) == 0x00001800) {
+#ifdef CONFIG_SBC8560
+	mc = ioremap(0xff700000 + 0x5000, sizeof(memctl_cpm2_t));
+#else
+	mc = &cpm2_immr->im_memctl;
+#endif
+
+	bigflash = 1;
+	if ((mc->memc_br0 & 0x00001800) == 0x00001800)
 		bigflash = 0;
-	} else if ((mc->memc_br0 & 0x00001800) == 0x00000800) {
-		bigflash = 1;
-	} else {
-		printk(KERN_WARNING "Bus Controller register BR0 is %08x. Cannot determine flash configuration\n", mc->memc_br0);
-		return 1;
-	}
 
-	/* Set parameters for the big flash chip (CS6 or CS0) */
-	sbc82xx_flash_map[bigflash].bankwidth = 4;
-	sbc82xx_flash_map[bigflash].size = 0x4000000;
-
-	/* Set parameters for the small flash chip (CS0 or CS6) */
-	sbc82xx_flash_map[!bigflash].bankwidth = 1;
-	sbc82xx_flash_map[!bigflash].size = 0x200000;
-
-	/* Set parameters for the user flash chip (CS1) */
-	sbc82xx_flash_map[2].bankwidth = 4;
-	sbc82xx_flash_map[2].size = 0x4000000;
-
-	sbc82xx_flash_map[0].phys = mc->memc_br0 & 0xffff8000;
-	sbc82xx_flash_map[1].phys = mc->memc_br6 & 0xffff8000;
-	sbc82xx_flash_map[2].phys = mc->memc_br1 & 0xffff8000;
+	init_sbc82xx_one_flash(sbc82xx_flash_map[0], mc->memc_br0, mc->memc_or0);
+	init_sbc82xx_one_flash(sbc82xx_flash_map[1], mc->memc_br6, mc->memc_or6);
+	init_sbc82xx_one_flash(sbc82xx_flash_map[2], mc->memc_br1, mc->memc_or1);
+
+#ifdef CONFIG_SBC8560
+	iounmap((void *) mc);
+#endif
 
 	for (i=0; i<3; i++) {
 		int8_t flashcs[3] = { 0, 6, 1 };
 		int nr_parts;
 
 		printk(KERN_NOTICE "PowerQUICC II %s (%ld MiB on CS%d",
-		       sbc82xx_flash_map[i].name, sbc82xx_flash_map[i].size >> 20, flashcs[i]);
+		       sbc82xx_flash_map[i].name,
+		       (sbc82xx_flash_map[i].size >> 20),
+		       flashcs[i]);
 		if (!sbc82xx_flash_map[i].phys) {
 			/* We know it can't be at zero. */
 			printk("): disabled by bootloader.\n");