mtd/drivers/mtd/chips cfi_cmdset_0001.c, 1.150,
1.151 cfi_cmdset_0002.c, 1.100, 1.101
David Woodhouse
dwmw2 at infradead.org
Sat Jul 10 17:14:20 EDT 2004
Update of /home/cvs/mtd/drivers/mtd/chips
In directory phoenix.infradead.org:/tmp/cvs-serv11947/drivers/mtd/chips
Modified Files:
cfi_cmdset_0001.c cfi_cmdset_0002.c
Log Message:
Make Intel command set build again.
Index: cfi_cmdset_0001.c
===================================================================
RCS file: /home/cvs/mtd/drivers/mtd/chips/cfi_cmdset_0001.c,v
retrieving revision 1.150
retrieving revision 1.151
diff -u -r1.150 -r1.151
--- cfi_cmdset_0001.c 15 Jun 2004 16:50:34 -0000 1.150
+++ cfi_cmdset_0001.c 10 Jul 2004 21:14:17 -0000 1.151
@@ -40,8 +40,8 @@
#define FORCE_WORD_WRITE 0
static int cfi_intelext_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
-static int cfi_intelext_read_user_prot_reg (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
-static int cfi_intelext_read_fact_prot_reg (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
+//static int cfi_intelext_read_user_prot_reg (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
+//static int cfi_intelext_read_fact_prot_reg (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
static int cfi_intelext_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
static int cfi_intelext_write_buffers(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
static int cfi_intelext_erase_varsize(struct mtd_info *, struct erase_info *);
@@ -302,8 +302,10 @@
printk(KERN_INFO "Using word write method\n" );
mtd->write = cfi_intelext_write_words;
}
+#if 0
mtd->read_user_prot_reg = cfi_intelext_read_user_prot_reg;
mtd->read_fact_prot_reg = cfi_intelext_read_fact_prot_reg;
+#endif
mtd->sync = cfi_intelext_sync;
mtd->lock = cfi_intelext_lock;
mtd->unlock = cfi_intelext_unlock;
@@ -417,7 +419,7 @@
{
DECLARE_WAITQUEUE(wait, current);
struct cfi_private *cfi = map->fldrv_priv;
- cfi_word status, status_OK = CMD(0x80), status_PWS = CMD(0x01);
+ map_word status, status_OK = CMD(0x80), status_PWS = CMD(0x01);
unsigned long timeo;
struct cfi_pri_intelext *cfip = cfi->cmdset_priv;
@@ -486,18 +488,18 @@
case FL_STATUS:
for (;;) {
- status = cfi_read(map, adr);
- if ((status & status_OK) == status_OK)
+ status = map_read(map, adr);
+ if (map_word_andequal(map, status, status_OK, status_OK))
break;
/* At this point we're fine with write operations
in other partitions as they don't conflict. */
- if (chip->priv && (status & status_PWS) == status_PWS)
+ if (chip->priv && map_word_andequal(map, status, status_PWS, status_PWS))
break;
if (time_after(jiffies, timeo)) {
- printk(KERN_ERR "Waiting for chip to be ready timed out. Status %llx\n",
- (long long)status);
+ printk(KERN_ERR "Waiting for chip to be ready timed out. Status %lx\n",
+ status.x[0]);
return -EIO;
}
spin_unlock(chip->mutex);
@@ -520,31 +522,31 @@
/* Erase suspend */
- cfi_write(map, CMD(0xB0), adr);
+ map_write(map, CMD(0xB0), adr);
/* If the flash has finished erasing, then 'erase suspend'
* appears to make some (28F320) flash devices switch to
* 'read' mode. Make sure that we switch to 'read status'
* mode so we get the right data. --rmk
*/
- cfi_write(map, CMD(0x70), adr);
+ map_write(map, CMD(0x70), adr);
chip->oldstate = FL_ERASING;
chip->state = FL_ERASE_SUSPENDING;
chip->erase_suspended = 1;
for (;;) {
- status = cfi_read(map, adr);
- if ((status & status_OK) == status_OK)
+ status = map_read(map, adr);
+ if (map_word_andequal(map, status, status_OK, status_OK))
break;
if (time_after(jiffies, timeo)) {
/* Urgh. Resume and pretend we weren't here. */
- cfi_write(map, CMD(0xd0), adr);
+ map_write(map, CMD(0xd0), adr);
/* Make sure we're in 'read status' mode if it had finished */
- cfi_write(map, CMD(0x70), adr);
+ map_write(map, CMD(0x70), adr);
chip->state = FL_ERASING;
chip->oldstate = FL_READY;
printk(KERN_ERR "Chip not ready after erase "
- "suspended: status = 0x%x\n", status);
+ "suspended: status = 0x%lx\n", status.x[0]);
return -EIO;
}
@@ -616,8 +618,8 @@
sending the 0x70 (Read Status) command to an erasing
chip and expecting it to be ignored, that's what we
do. */
- cfi_write(map, CMD(0xd0), adr);
- cfi_write(map, CMD(0x70), adr);
+ map_write(map, CMD(0xd0), adr);
+ map_write(map, CMD(0x70), adr);
chip->oldstate = FL_READY;
chip->state = FL_ERASING;
break;
@@ -643,7 +645,7 @@
adr += chip->start;
/* Ensure cmd read/writes are aligned. */
- cmd_addr = adr & ~(CFIDEV_BUSWIDTH-1);
+ cmd_addr = adr & ~(map_bankwidth(map)-1);
spin_lock(chip->mutex);
@@ -651,7 +653,7 @@
if (!ret) {
if (chip->state != FL_POINT && chip->state != FL_READY)
- cfi_write(map, CMD(0xff), cmd_addr);
+ map_write(map, CMD(0xff), cmd_addr);
chip->state = FL_POINT;
chip->ref_point_counter++;
@@ -757,7 +759,7 @@
adr += chip->start;
/* Ensure cmd read/writes are aligned. */
- cmd_addr = adr & ~(CFIDEV_BUSWIDTH-1);
+ cmd_addr = adr & ~(map_bankwidth(map)-1);
spin_lock(chip->mutex);
ret = get_chip(map, chip, cmd_addr, FL_READY);
@@ -767,7 +769,7 @@
}
if (chip->state != FL_POINT && chip->state != FL_READY) {
- cfi_write(map, CMD(0xff), cmd_addr);
+ map_write(map, CMD(0xff), cmd_addr);
chip->state = FL_READY;
}
@@ -818,7 +820,7 @@
}
return ret;
}
-
+#if 0
static int cfi_intelext_read_prot_reg (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf, int base_offst, int reg_sz)
{
struct map_info *map = mtd->priv;
@@ -849,7 +851,7 @@
}
if (chip->state != FL_JEDEC_QUERY) {
- cfi_write(map, CMD(0x90), chip->start);
+ map_write(map, CMD(0x90), chip->start);
chip->state = FL_JEDEC_QUERY;
}
@@ -909,12 +911,12 @@
return cfi_intelext_read_prot_reg(mtd, from, len, retlen, buf, base_offst, reg_sz);
}
+#endif
-
-static int do_write_oneword(struct map_info *map, struct flchip *chip, unsigned long adr, cfi_word datum)
+static int do_write_oneword(struct map_info *map, struct flchip *chip, unsigned long adr, map_word datum)
{
struct cfi_private *cfi = map->fldrv_priv;
- cfi_word status, status_OK;
+ map_word status, status_OK;
unsigned long timeo;
int z, ret=0;
@@ -931,12 +933,12 @@
}
ENABLE_VPP(map);
- cfi_write(map, CMD(0x40), adr);
- cfi_write(map, datum, adr);
+ map_write(map, CMD(0x40), adr);
+ map_write(map, datum, adr);
chip->state = FL_WRITING;
spin_unlock(chip->mutex);
- INVALIDATE_CACHED_RANGE(map, adr, CFIDEV_BUSWIDTH);
+ INVALIDATE_CACHED_RANGE(map, adr, map_bankwidth(map));
cfi_udelay(chip->word_write_time);
spin_lock(chip->mutex);
@@ -957,8 +959,8 @@
continue;
}
- status = cfi_read(map, adr);
- if ((status & status_OK) == status_OK)
+ status = map_read(map, adr);
+ if (map_word_andequal(map, status, status_OK, status_OK))
break;
/* OK Still waiting */
@@ -986,11 +988,11 @@
/* Done and happy. */
chip->state = FL_STATUS;
/* check for lock bit */
- if (status & CMD(0x02)) {
+ if (map_word_bitsset(map, status, CMD(0x02))) {
/* clear status */
- cfi_write(map, CMD(0x50), adr);
+ map_write(map, CMD(0x50), adr);
/* put back into read status register mode */
- cfi_write(map, CMD(0x70), adr);
+ map_write(map, CMD(0x70), adr);
ret = -EROFS;
}
out:
@@ -1017,35 +1019,22 @@
ofs = to - (chipnum << cfi->chipshift);
/* If it's not bus-aligned, do the first byte write */
- if (ofs & (CFIDEV_BUSWIDTH-1)) {
- unsigned long bus_ofs = ofs & ~(CFIDEV_BUSWIDTH-1);
+ if (ofs & (map_bankwidth(map)-1)) {
+ unsigned long bus_ofs = ofs & ~(map_bankwidth(map)-1);
int gap = ofs - bus_ofs;
- int i = 0, n = 0;
- u_char tmp_buf[8];
- cfi_word datum;
-
- while (gap--)
- tmp_buf[i++] = 0xff;
- while (len && i < CFIDEV_BUSWIDTH)
- tmp_buf[i++] = buf[n++], len--;
- while (i < CFIDEV_BUSWIDTH)
- tmp_buf[i++] = 0xff;
-
- if (cfi_buswidth_is_2()) {
- datum = *(__u16*)tmp_buf;
- } else if (cfi_buswidth_is_4()) {
- datum = *(__u32*)tmp_buf;
- } else if (cfi_buswidth_is_8()) {
- datum = *(__u64*)tmp_buf;
- } else {
- return -EINVAL; /* should never happen, but be safe */
- }
+ int n;
+ map_word datum;
+
+ n = min_t(int, len, map_bankwidth(map)-gap);
+ datum = map_word_ff(map);
+ datum = map_word_load_partial(map, datum, buf, gap, n);
ret = do_write_oneword(map, &cfi->chips[chipnum],
bus_ofs, datum);
if (ret)
return ret;
-
+
+ len -= n;
ofs += n;
buf += n;
(*retlen) += n;
@@ -1058,30 +1047,18 @@
}
}
- while(len >= CFIDEV_BUSWIDTH) {
- cfi_word datum;
-
- if (cfi_buswidth_is_1()) {
- datum = *(__u8*)buf;
- } else if (cfi_buswidth_is_2()) {
- datum = *(__u16*)buf;
- } else if (cfi_buswidth_is_4()) {
- datum = *(__u32*)buf;
- } else if (cfi_buswidth_is_8()) {
- datum = *(__u64*)buf;
- } else {
- return -EINVAL;
- }
+ while(len >= map_bankwidth(map)) {
+ map_word datum = map_word_load(map, buf);
ret = do_write_oneword(map, &cfi->chips[chipnum],
ofs, datum);
if (ret)
return ret;
- ofs += CFIDEV_BUSWIDTH;
- buf += CFIDEV_BUSWIDTH;
- (*retlen) += CFIDEV_BUSWIDTH;
- len -= CFIDEV_BUSWIDTH;
+ ofs += map_bankwidth(map);
+ buf += map_bankwidth(map);
+ (*retlen) += map_bankwidth(map);
+ len -= map_bankwidth(map);
if (ofs >> cfi->chipshift) {
chipnum ++;
@@ -1091,32 +1068,18 @@
}
}
- if (len & (CFIDEV_BUSWIDTH-1)) {
- int i = 0, n = 0;
- u_char tmp_buf[8];
- cfi_word datum;
-
- while (len--)
- tmp_buf[i++] = buf[n++];
- while (i < CFIDEV_BUSWIDTH)
- tmp_buf[i++] = 0xff;
-
- if (cfi_buswidth_is_2()) {
- datum = *(__u16*)tmp_buf;
- } else if (cfi_buswidth_is_4()) {
- datum = *(__u32*)tmp_buf;
- } else if (cfi_buswidth_is_8()) {
- datum = *(__u64*)tmp_buf;
- } else {
- return -EINVAL; /* should never happen, but be safe */
- }
+ if (len & (map_bankwidth(map)-1)) {
+ map_word datum;
+
+ datum = map_word_ff(map);
+ datum = map_word_load_partial(map, datum, buf, 0, len);
ret = do_write_oneword(map, &cfi->chips[chipnum],
ofs, datum);
if (ret)
return ret;
- (*retlen) += n;
+ (*retlen) += len;
}
return 0;
@@ -1127,11 +1090,11 @@
unsigned long adr, const u_char *buf, int len)
{
struct cfi_private *cfi = map->fldrv_priv;
- cfi_word status, status_OK;
+ map_word status, status_OK;
unsigned long cmd_adr, timeo;
int wbufsize, z, ret=0, bytes, words;
- wbufsize = CFIDEV_INTERLEAVE << cfi->cfiq->MaxBufWriteSize;
+ wbufsize = cfi_interleave(cfi) << cfi->cfiq->MaxBufWriteSize;
adr += chip->start;
cmd_adr = adr & ~(wbufsize-1);
@@ -1150,12 +1113,12 @@
So we must check here and reset those bits if they're set. Otherwise
we're just pissing in the wind */
if (chip->state != FL_STATUS)
- cfi_write(map, CMD(0x70), cmd_adr);
- status = cfi_read(map, cmd_adr);
- if (status & CMD(0x30)) {
- printk(KERN_WARNING "SR.4 or SR.5 bits set in buffer write (status %x). Clearing.\n", status);
- cfi_write(map, CMD(0x50), cmd_adr);
- cfi_write(map, CMD(0x70), cmd_adr);
+ map_write(map, CMD(0x70), cmd_adr);
+ status = map_read(map, cmd_adr);
+ if (map_word_bitsset(map, status, CMD(0x30))) {
+ printk(KERN_WARNING "SR.4 or SR.5 bits set in buffer write (status %lx). Clearing.\n", status.x[0]);
+ map_write(map, CMD(0x50), cmd_adr);
+ map_write(map, CMD(0x70), cmd_adr);
}
ENABLE_VPP(map);
@@ -1163,10 +1126,10 @@
z = 0;
for (;;) {
- cfi_write(map, CMD(0xe8), cmd_adr);
+ map_write(map, CMD(0xe8), cmd_adr);
- status = cfi_read(map, cmd_adr);
- if ((status & status_OK) == status_OK)
+ status = map_read(map, cmd_adr);
+ if (map_word_andequal(map, status, status_OK, status_OK))
break;
spin_unlock(chip->mutex);
@@ -1175,58 +1138,43 @@
if (++z > 20) {
/* Argh. Not ready for write to buffer */
- cfi_write(map, CMD(0x70), cmd_adr);
+ map_write(map, CMD(0x70), cmd_adr);
chip->state = FL_STATUS;
- printk(KERN_ERR "Chip not ready for buffer write. Xstatus = %llx, status = %llx\n", (__u64)status, (__u64)cfi_read(map, cmd_adr));
+ printk(KERN_ERR "Chip not ready for buffer write. Xstatus = %lx, status = %lx\n",
+ status.x[0], map_read(map, cmd_adr).x[0]);
/* Odd. Clear status bits */
- cfi_write(map, CMD(0x50), cmd_adr);
- cfi_write(map, CMD(0x70), cmd_adr);
+ map_write(map, CMD(0x50), cmd_adr);
+ map_write(map, CMD(0x70), cmd_adr);
ret = -EIO;
goto out;
}
}
/* Write length of data to come */
- bytes = len & (CFIDEV_BUSWIDTH-1);
- words = len / CFIDEV_BUSWIDTH;
- cfi_write(map, CMD(words - !bytes), cmd_adr );
+ bytes = len & (map_bankwidth(map)-1);
+ words = len / map_bankwidth(map);
+ map_write(map, CMD(words - !bytes), cmd_adr );
/* Write data */
z = 0;
- while(z < words * CFIDEV_BUSWIDTH) {
- if (cfi_buswidth_is_1()) {
- map_write8 (map, *((__u8*)buf), adr+z);
- } else if (cfi_buswidth_is_2()) {
- map_write16 (map, *((__u16*)buf), adr+z);
- } else if (cfi_buswidth_is_4()) {
- map_write32 (map, *((__u32*)buf), adr+z);
- } else if (cfi_buswidth_is_8()) {
- map_write64 (map, *((__u64*)buf), adr+z);
- } else {
- ret = -EINVAL;
- goto out;
- }
- z += CFIDEV_BUSWIDTH;
- buf += CFIDEV_BUSWIDTH;
+ while(z < words * map_bankwidth(map)) {
+ map_word datum = map_word_load(map, buf);
+ map_write(map, datum, adr+z);
+
+ z += map_bankwidth(map);
+ buf += map_bankwidth(map);
}
+
if (bytes) {
- int i = 0, n = 0;
- u_char tmp_buf[8], *tmp_p = tmp_buf;
+ map_word datum;
- while (bytes--)
- tmp_buf[i++] = buf[n++];
- while (i < CFIDEV_BUSWIDTH)
- tmp_buf[i++] = 0xff;
- if (cfi_buswidth_is_2()) {
- map_write16 (map, *((__u16*)tmp_p), adr+z);
- } else if (cfi_buswidth_is_4()) {
- map_write32 (map, *((__u32*)tmp_p), adr+z);
- } else if (cfi_buswidth_is_8()) {
- map_write64 (map, *((__u64*)tmp_p), adr+z);
- }
+ datum = map_word_ff(map);
+ datum = map_word_load_partial(map, datum, buf, 0, bytes);
+ map_write(map, datum, adr+z);
}
+
/* GO GO GO */
- cfi_write(map, CMD(0xd0), cmd_adr);
+ map_write(map, CMD(0xd0), cmd_adr);
chip->state = FL_WRITING;
spin_unlock(chip->mutex);
@@ -1250,8 +1198,8 @@
continue;
}
- status = cfi_read(map, cmd_adr);
- if ((status & status_OK) == status_OK)
+ status = map_read(map, cmd_adr);
+ if (map_word_andequal(map, status, status_OK, status_OK))
break;
/* OK Still waiting */
@@ -1280,11 +1228,11 @@
chip->state = FL_STATUS;
/* check for lock bit */
- if (status & CMD(0x02)) {
+ if (map_word_bitsset(map, status, CMD(0x02))) {
/* clear status */
- cfi_write(map, CMD(0x50), cmd_adr);
+ map_write(map, CMD(0x50), cmd_adr);
/* put back into read status register mode */
- cfi_write(map, CMD(0x70), adr);
+ map_write(map, CMD(0x70), adr);
ret = -EROFS;
}
@@ -1299,7 +1247,7 @@
{
struct map_info *map = mtd->priv;
struct cfi_private *cfi = map->fldrv_priv;
- int wbufsize = CFIDEV_INTERLEAVE << cfi->cfiq->MaxBufWriteSize;
+ int wbufsize = cfi_interleave(cfi) << cfi->cfiq->MaxBufWriteSize;
int ret = 0;
int chipnum;
unsigned long ofs;
@@ -1312,8 +1260,8 @@
ofs = to - (chipnum << cfi->chipshift);
/* If it's not bus-aligned, do the first word write */
- if (ofs & (CFIDEV_BUSWIDTH-1)) {
- size_t local_len = (-ofs)&(CFIDEV_BUSWIDTH-1);
+ if (ofs & (map_bankwidth(map)-1)) {
+ size_t local_len = (-ofs)&(map_bankwidth(map)-1);
if (local_len > len)
local_len = len;
ret = cfi_intelext_write_words(mtd, to, local_len,
@@ -1458,7 +1406,7 @@
unsigned long adr, int len, void *thunk)
{
struct cfi_private *cfi = map->fldrv_priv;
- cfi_word status, status_OK;
+ map_word status, status_OK;
unsigned long timeo;
int retries = 3;
DECLARE_WAITQUEUE(wait, current);
@@ -1479,11 +1427,11 @@
ENABLE_VPP(map);
/* Clear the status register first */
- cfi_write(map, CMD(0x50), adr);
+ map_write(map, CMD(0x50), adr);
/* Now erase */
- cfi_write(map, CMD(0x20), adr);
- cfi_write(map, CMD(0xD0), adr);
+ map_write(map, CMD(0x20), adr);
+ map_write(map, CMD(0xD0), adr);
chip->state = FL_ERASING;
chip->erase_suspended = 0;
@@ -1515,19 +1463,19 @@
chip->erase_suspended = 0;
}
- status = cfi_read(map, adr);
- if ((status & status_OK) == status_OK)
+ status = map_read(map, adr);
+ if (map_word_andequal(map, status, status_OK, status_OK))
break;
/* OK Still waiting */
if (time_after(jiffies, timeo)) {
- cfi_write(map, CMD(0x70), adr);
+ map_write(map, CMD(0x70), adr);
chip->state = FL_STATUS;
- printk(KERN_ERR "waiting for erase at %08lx to complete timed out. Xstatus = %llx, status = %llx.\n",
- adr, (__u64)status, (__u64)cfi_read(map, adr));
+ printk(KERN_ERR "waiting for erase at %08lx to complete timed out. Xstatus = %lx, status = %lx.\n",
+ adr, status.x[0], map_read(map, adr).x[0]);
/* Clear status bits */
- cfi_write(map, CMD(0x50), adr);
- cfi_write(map, CMD(0x70), adr);
+ map_write(map, CMD(0x50), adr);
+ map_write(map, CMD(0x70), adr);
DISABLE_VPP(map);
spin_unlock(chip->mutex);
return -EIO;
@@ -1544,43 +1492,46 @@
ret = 0;
/* We've broken this before. It doesn't hurt to be safe */
- cfi_write(map, CMD(0x70), adr);
+ map_write(map, CMD(0x70), adr);
chip->state = FL_STATUS;
- status = cfi_read(map, adr);
+ status = map_read(map, adr);
/* check for lock bit */
- if (status & CMD(0x3a)) {
- unsigned char chipstatus = status;
- if (status != CMD(status & 0xff)) {
- int i;
- for (i = 1; i<CFIDEV_INTERLEAVE; i++) {
- chipstatus |= status >> (cfi->device_type * 8);
+ if (map_word_bitsset(map, status, CMD(0x3a))) {
+ unsigned char chipstatus = status.x[0];
+ if (!map_word_equal(map, status, CMD(chipstatus))) {
+ int i, w;
+ for (w=0; i<map_words(map); w++) {
+ for (i = 0; i<cfi_interleave(cfi); i++) {
+ chipstatus |= status.x[w] >> (cfi->device_type * 8);
+ }
}
- printk(KERN_WARNING "Status is not identical for all chips: 0x%llx. Merging to give 0x%02x\n", (__u64)status, chipstatus);
+ printk(KERN_WARNING "Status is not identical for all chips: 0x%lx. Merging to give 0x%02x\n",
+ status.x[0], chipstatus);
}
/* Reset the error bits */
- cfi_write(map, CMD(0x50), adr);
- cfi_write(map, CMD(0x70), adr);
+ map_write(map, CMD(0x50), adr);
+ map_write(map, CMD(0x70), adr);
if ((chipstatus & 0x30) == 0x30) {
- printk(KERN_NOTICE "Chip reports improper command sequence: status 0x%llx\n", (__u64)status);
+ printk(KERN_NOTICE "Chip reports improper command sequence: status 0x%x\n", chipstatus);
ret = -EIO;
} else if (chipstatus & 0x02) {
/* Protection bit set */
ret = -EROFS;
} else if (chipstatus & 0x8) {
/* Voltage */
- printk(KERN_WARNING "Chip reports voltage low on erase: status 0x%llx\n", (__u64)status);
+ printk(KERN_WARNING "Chip reports voltage low on erase: status 0x%x\n", chipstatus);
ret = -EIO;
} else if (chipstatus & 0x20) {
if (retries--) {
- printk(KERN_DEBUG "Chip erase failed at 0x%08lx: status 0x%llx. Retrying...\n", adr, (__u64)status);
+ printk(KERN_DEBUG "Chip erase failed at 0x%08lx: status 0x%x. Retrying...\n", adr, chipstatus);
timeo = jiffies + HZ;
chip->state = FL_STATUS;
spin_unlock(chip->mutex);
goto retry;
}
- printk(KERN_DEBUG "Chip erase failed at 0x%08lx: status 0x%llx\n", adr, (__u64)status);
+ printk(KERN_DEBUG "Chip erase failed at 0x%08lx: status 0x%x\n", adr, chipstatus);
ret = -EIO;
}
}
@@ -1671,7 +1622,7 @@
unsigned long adr, int len, void *thunk)
{
struct cfi_private *cfi = map->fldrv_priv;
- cfi_word status, status_OK;
+ map_word status, status_OK;
unsigned long timeo = jiffies + HZ;
int ret;
@@ -1688,13 +1639,13 @@
}
ENABLE_VPP(map);
- cfi_write(map, CMD(0x60), adr);
+ map_write(map, CMD(0x60), adr);
if (thunk == DO_XXLOCK_ONEBLOCK_LOCK) {
- cfi_write(map, CMD(0x01), adr);
+ map_write(map, CMD(0x01), adr);
chip->state = FL_LOCKING;
} else if (thunk == DO_XXLOCK_ONEBLOCK_UNLOCK) {
- cfi_write(map, CMD(0xD0), adr);
+ map_write(map, CMD(0xD0), adr);
chip->state = FL_UNLOCKING;
} else
BUG();
@@ -1709,15 +1660,16 @@
timeo = jiffies + (HZ*20);
for (;;) {
- status = cfi_read(map, adr);
- if ((status & status_OK) == status_OK)
+ status = map_read(map, adr);
+ if (map_word_andequal(map, status, status_OK, status_OK))
break;
/* OK Still waiting */
if (time_after(jiffies, timeo)) {
- cfi_write(map, CMD(0x70), adr);
+ map_write(map, CMD(0x70), adr);
chip->state = FL_STATUS;
- printk(KERN_ERR "waiting for unlock to complete timed out. Xstatus = %llx, status = %llx.\n", (__u64)status, (__u64)cfi_read(map, adr));
+ printk(KERN_ERR "waiting for unlock to complete timed out. Xstatus = %lx, status = %lx.\n",
+ status.x[0], map_read(map, adr).x[0]);
DISABLE_VPP(map);
spin_unlock(chip->mutex);
return -EIO;
@@ -1855,7 +1807,7 @@
/* Go to known state. Chip may have been power cycled */
if (chip->state == FL_PM_SUSPENDED) {
- cfi_write(map, CMD(0xFF), cfi->chips[i].start);
+ map_write(map, CMD(0xFF), cfi->chips[i].start);
chip->state = FL_READY;
wake_up(&chip->wq);
}
Index: cfi_cmdset_0002.c
===================================================================
RCS file: /home/cvs/mtd/drivers/mtd/chips/cfi_cmdset_0002.c,v
retrieving revision 1.100
retrieving revision 1.101
diff -u -r1.100 -r1.101
--- cfi_cmdset_0002.c 9 Jul 2004 16:07:22 -0000 1.100
+++ cfi_cmdset_0002.c 10 Jul 2004 21:14:17 -0000 1.101
@@ -844,25 +844,10 @@
cfi_spin_unlock(cfi->chips[chipnum].mutex);
- if (map_bankwidth_is_large(map)) {
- /* Copy in the bytes we want from the data we were asked to write */
- while (len && i < map_bankwidth(map)) {
- ((char *)&tmp_buf)[i++] = buf[n++];
- len--;
- }
- } else {
- while (len && i < map_bankwidth(map)) {
- int bitpos;
-#ifdef __LITTLE_ENDIAN
- bitpos = i*8;
-#else /* __BIG_ENDIAN */
- bitpos = (map_bankwidth(map)-i)*8;
-#endif
- tmp_buf.x[0] &= ~(0xff << bitpos);
- tmp_buf.x[0] |= buf[n++] << bitpos;
- i++;
- }
- }
+ /* Number of bytes to copy from buffer */
+ n = min_t(int, len, map_bankwidth(map)-i);
+
+ tmp_buf = map_word_load_partial(map, tmp_buf, buf, i, n);
ret = do_write_oneword(map, &cfi->chips[chipnum],
bus_ofs, tmp_buf);
@@ -908,7 +893,6 @@
/* Write the trailing bytes if any */
if (len & (map_bankwidth(map)-1)) {
- int i = 0, n = 0;
map_word tmp_buf;
retry1:
@@ -936,31 +920,14 @@
cfi_spin_unlock(cfi->chips[chipnum].mutex);
-
- if (map_bankwidth_is_large(map)) {
- /* Copy in the bytes we want from the data we were asked to write */
- while (len--)
- ((char *)&tmp_buf)[i++] = buf[n++];
- } else {
- while (len--) {
- int bitpos;
-#ifdef __LITTLE_ENDIAN
- bitpos = i*8;
-#else /* __BIG_ENDIAN */
- bitpos = (map_bankwidth(map)-i)*8;
-#endif
- tmp_buf.x[0] &= ~(0xff << bitpos);
- tmp_buf.x[0] |= buf[n++] << bitpos;
- i++;
- }
- }
+ tmp_buf = map_word_load_partial(map, tmp_buf, buf, 0, len);
ret = do_write_oneword(map, &cfi->chips[chipnum],
ofs, tmp_buf);
if (ret)
return ret;
- (*retlen) += n;
+ (*retlen) += len;
}
return 0;
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