mtd/drivers/mtd/chips jedec_probe.c,1.20,1.21
Thayne Harbaugh
tharbaugh at lnxi.com
Mon Mar 10 18:34:54 EST 2003
Update of /home/cvs/mtd/drivers/mtd/chips
In directory phoenix.infradead.org:/tmp/cvs-serv15504
Modified Files:
jedec_probe.c
Log Message:
Add unlock addresses to jedec_table[]. Improve probe device matching with new function jedec_match().
Index: jedec_probe.c
===================================================================
RCS file: /home/cvs/mtd/drivers/mtd/chips/jedec_probe.c,v
retrieving revision 1.20
retrieving revision 1.21
diff -u -r1.20 -r1.21
--- jedec_probe.c 20 Feb 2003 22:22:39 -0000 1.20
+++ jedec_probe.c 10 Mar 2003 23:34:51 -0000 1.21
@@ -100,7 +100,8 @@
#define PM49FL008 0x006A
/* ST - www.st.com */
-#define M29W800T 0x00D7
+#define M29W800DT 0x00D7
+#define M29W800DB 0x005B
#define M29W160DT 0x22C4
#define M29W160DB 0x2249
#define M29W040B 0x00E3
@@ -129,6 +130,44 @@
#define TC58FVB641 0x0095
+/*
+ * Unlock address sets for AMD command sets.
+ * Intel command sets use the MTD_UADDR_UNNECESSARY.
+ * Each identifier, except MTD_UADDR_UNNECESSARY, must
+ * be defined below in unlock_addrs[]
+ */
+enum uaddr {
+ MTD_UADDR_0x0555_0x02AA,
+ MTD_UADDR_0x5555_0x2AAA,
+ MTD_UADDR_DONT_CARE, /* Requires an arbitrary address */
+ MTD_UADDR_UNNECESSARY /* Does not require any address */
+};
+
+
+struct unlock_addr {
+ int addr1;
+ int addr2;
+};
+
+
+static struct unlock_addr unlock_addrs[] = {
+ [MTD_UADDR_0x0555_0x02AA] = {
+ .addr1 = 0x0555,
+ .addr2 = 0x02aa
+ },
+
+ [MTD_UADDR_0x5555_0x2AAA] = {
+ .addr1 = 0x5555,
+ .addr2 = 0x2aaa
+ },
+
+ [MTD_UADDR_DONT_CARE] = {
+ .addr1 = 0x0000, /* Doesn't matter which address */
+ .addr2 = 0x0000 /* is used - must be last entry */
+ }
+};
+
+
struct amd_flash_info {
const __u16 mfr_id;
const __u16 dev_id;
@@ -137,6 +176,7 @@
const int InterfaceDesc;
const int NumEraseRegions;
const int CmdSet;
+ const int uaddr;
const ulong regions[4];
};
@@ -156,6 +196,7 @@
mfr_id: MANUFACTURER_AMD,
dev_id: AM29F032B,
name: "AMD AM29F032B",
+ uaddr: MTD_UADDR_0x0555_0x02AA,
DevSize: SIZE_4MiB,
CmdSet: P_ID_AMD_STD,
NumEraseRegions: 1,
@@ -165,6 +206,7 @@
mfr_id: MANUFACTURER_AMD,
dev_id: AM29LV160DT,
name: "AMD AM29LV160DT",
+ uaddr: MTD_UADDR_0x0555_0x02AA, /* FIXME - for words, not bytes!! */
DevSize: SIZE_2MiB,
CmdSet: P_ID_AMD_STD,
NumEraseRegions: 4,
@@ -177,6 +219,7 @@
mfr_id: MANUFACTURER_AMD,
dev_id: AM29LV160DB,
name: "AMD AM29LV160DB",
+ uaddr: MTD_UADDR_0x0555_0x02AA, /* FIXME - for words, not bytes!! */
DevSize: SIZE_2MiB,
CmdSet: P_ID_AMD_STD,
NumEraseRegions: 4,
@@ -189,6 +232,7 @@
mfr_id: MANUFACTURER_TOSHIBA,
dev_id: TC58FVT160,
name: "Toshiba TC58FVT160",
+ uaddr: MTD_UADDR_0x0555_0x02AA, /* FIXME - for words, not bytes!! */
DevSize: SIZE_2MiB,
CmdSet: P_ID_AMD_STD,
NumEraseRegions: 4,
@@ -201,6 +245,7 @@
mfr_id: MANUFACTURER_TOSHIBA,
dev_id: TC58FVB160,
name: "Toshiba TC58FVB160",
+ uaddr: MTD_UADDR_0x0555_0x02AA, /* FIXME - for words, not bytes!! */
DevSize: SIZE_2MiB,
CmdSet: P_ID_AMD_STD,
NumEraseRegions: 4,
@@ -213,6 +258,7 @@
mfr_id: MANUFACTURER_TOSHIBA,
dev_id: TC58FVB321,
name: "Toshiba TC58FVB321",
+ uaddr: MTD_UADDR_0x0555_0x02AA, /* FIXME - for words, not bytes!! */
DevSize: SIZE_4MiB,
CmdSet: P_ID_AMD_STD,
NumEraseRegions: 2,
@@ -223,6 +269,7 @@
mfr_id: MANUFACTURER_TOSHIBA,
dev_id: TC58FVT321,
name: "Toshiba TC58FVT321",
+ uaddr: MTD_UADDR_0x0555_0x02AA, /* FIXME - for words, not bytes!! */
DevSize: SIZE_4MiB,
CmdSet: P_ID_AMD_STD,
NumEraseRegions: 2,
@@ -233,6 +280,7 @@
mfr_id: MANUFACTURER_TOSHIBA,
dev_id: TC58FVB641,
name: "Toshiba TC58FVB641",
+ uaddr: MTD_UADDR_0x0555_0x02AA, /* FIXME - for words, not bytes!! */
DevSize: SIZE_8MiB,
CmdSet: P_ID_AMD_STD,
NumEraseRegions: 2,
@@ -243,6 +291,7 @@
mfr_id: MANUFACTURER_TOSHIBA,
dev_id: TC58FVT641,
name: "Toshiba TC58FVT641",
+ uaddr: MTD_UADDR_0x0555_0x02AA, /* FIXME - for words, not bytes!! */
DevSize: SIZE_8MiB,
CmdSet: P_ID_AMD_STD,
NumEraseRegions: 2,
@@ -253,6 +302,7 @@
mfr_id: MANUFACTURER_FUJITSU,
dev_id: MBM29LV650UE,
name: "Fujitsu MBM29LV650UE",
+ uaddr: MTD_UADDR_0x0555_0x02AA,
DevSize: SIZE_8MiB,
CmdSet: P_ID_AMD_STD,
NumEraseRegions: 1,
@@ -262,6 +312,7 @@
mfr_id: MANUFACTURER_FUJITSU,
dev_id: MBM29LV320TE,
name: "Fujitsu MBM29LV320TE",
+ uaddr: MTD_UADDR_0x0555_0x02AA, /* FIXME - for words, not bytes!! */
DevSize: SIZE_4MiB,
CmdSet: P_ID_AMD_STD,
NumEraseRegions: 2,
@@ -272,6 +323,7 @@
mfr_id: MANUFACTURER_FUJITSU,
dev_id: MBM29LV320BE,
name: "Fujitsu MBM29LV320BE",
+ uaddr: MTD_UADDR_0x0555_0x02AA, /* FIXME - for words, not bytes!! */
DevSize: SIZE_4MiB,
CmdSet: P_ID_AMD_STD,
NumEraseRegions: 2,
@@ -282,6 +334,7 @@
mfr_id: MANUFACTURER_FUJITSU,
dev_id: MBM29LV160TE,
name: "Fujitsu MBM29LV160TE",
+ uaddr: MTD_UADDR_0x0555_0x02AA, /* FIXME - for words, not bytes!! */
DevSize: SIZE_2MiB,
CmdSet: P_ID_AMD_STD,
NumEraseRegions: 4,
@@ -294,6 +347,7 @@
mfr_id: MANUFACTURER_FUJITSU,
dev_id: MBM29LV160BE,
name: "Fujitsu MBM29LV160BE",
+ uaddr: MTD_UADDR_0x0555_0x02AA, /* FIXME - for words, not bytes!! */
DevSize: SIZE_2MiB,
CmdSet: P_ID_AMD_STD,
NumEraseRegions: 4,
@@ -306,6 +360,7 @@
mfr_id: MANUFACTURER_FUJITSU,
dev_id: MBM29LV800BA,
name: "Fujitsu MBM29LV800BA",
+ uaddr: MTD_UADDR_0x0555_0x02AA, /* FIXME - for words, not bytes!! */
DevSize: SIZE_1MiB,
CmdSet: P_ID_AMD_STD,
NumEraseRegions: 4,
@@ -318,6 +373,7 @@
mfr_id: MANUFACTURER_FUJITSU,
dev_id: MBM29LV800TA,
name: "Fujitsu MBM29LV800TA",
+ uaddr: MTD_UADDR_0x0555_0x02AA, /* FIXME - for words, not bytes!! */
DevSize: SIZE_1MiB,
CmdSet: P_ID_AMD_STD,
NumEraseRegions: 4,
@@ -330,6 +386,7 @@
mfr_id: MANUFACTURER_AMD,
dev_id: AM29LV800BB,
name: "AMD AM29LV800BB",
+ uaddr: MTD_UADDR_0x0555_0x02AA, /* FIXME - for words, not bytes!! */
DevSize: SIZE_1MiB,
CmdSet: P_ID_AMD_STD,
NumEraseRegions: 4,
@@ -342,6 +399,7 @@
mfr_id: MANUFACTURER_AMD,
dev_id: AM29F800BB,
name: "AMD AM29F800BB",
+ uaddr: MTD_UADDR_0x0555_0x02AA, /* FIXME - for words, not bytes!! */
DevSize: SIZE_1MiB,
CmdSet: P_ID_AMD_STD,
NumEraseRegions: 4,
@@ -354,6 +412,7 @@
mfr_id: MANUFACTURER_AMD,
dev_id: AM29LV800BT,
name: "AMD AM29LV800BT",
+ uaddr: MTD_UADDR_0x0555_0x02AA, /* FIXME - for words, not bytes!! */
DevSize: SIZE_1MiB,
CmdSet: P_ID_AMD_STD,
NumEraseRegions: 4,
@@ -366,18 +425,7 @@
mfr_id: MANUFACTURER_AMD,
dev_id: AM29F800BT,
name: "AMD AM29F800BT",
- DevSize: SIZE_1MiB,
- CmdSet: P_ID_AMD_STD,
- NumEraseRegions: 4,
- regions: {ERASEINFO(0x10000,15),
- ERASEINFO(0x08000,1),
- ERASEINFO(0x02000,2),
- ERASEINFO(0x04000,1)
- }
- }, {
- mfr_id: MANUFACTURER_AMD,
- dev_id: AM29LV800BB,
- name: "AMD AM29LV800BB",
+ uaddr: MTD_UADDR_0x0555_0x02AA, /* FIXME - for words, not bytes!! */
DevSize: SIZE_1MiB,
CmdSet: P_ID_AMD_STD,
NumEraseRegions: 4,
@@ -390,6 +438,7 @@
mfr_id: MANUFACTURER_INTEL,
dev_id: I28F004B3B,
name: "Intel 28F004B3B",
+ uaddr: MTD_UADDR_UNNECESSARY,
DevSize: SIZE_512KiB,
CmdSet: P_ID_INTEL_STD,
NumEraseRegions: 2,
@@ -401,6 +450,7 @@
mfr_id: MANUFACTURER_INTEL,
dev_id: I28F004B3T,
name: "Intel 28F004B3T",
+ uaddr: MTD_UADDR_UNNECESSARY,
DevSize: SIZE_512KiB,
CmdSet: P_ID_INTEL_STD,
NumEraseRegions: 2,
@@ -412,6 +462,7 @@
mfr_id: MANUFACTURER_INTEL,
dev_id: I28F400B3B,
name: "Intel 28F400B3B",
+ uaddr: MTD_UADDR_UNNECESSARY,
DevSize: SIZE_512KiB,
CmdSet: P_ID_INTEL_STD,
NumEraseRegions: 2,
@@ -423,6 +474,7 @@
mfr_id: MANUFACTURER_INTEL,
dev_id: I28F400B3T,
name: "Intel 28F400B3T",
+ uaddr: MTD_UADDR_UNNECESSARY,
DevSize: SIZE_512KiB,
CmdSet: P_ID_INTEL_STD,
NumEraseRegions: 2,
@@ -434,6 +486,7 @@
mfr_id: MANUFACTURER_INTEL,
dev_id: I28F008B3B,
name: "Intel 28F008B3B",
+ uaddr: MTD_UADDR_UNNECESSARY,
DevSize: SIZE_1MiB,
CmdSet: P_ID_INTEL_STD,
NumEraseRegions: 2,
@@ -445,6 +498,7 @@
mfr_id: MANUFACTURER_INTEL,
dev_id: I28F008B3T,
name: "Intel 28F008B3T",
+ uaddr: MTD_UADDR_UNNECESSARY,
DevSize: SIZE_1MiB,
CmdSet: P_ID_INTEL_STD,
NumEraseRegions: 2,
@@ -456,6 +510,7 @@
mfr_id: MANUFACTURER_INTEL,
dev_id: I28F008S5,
name: "Intel 28F008S5",
+ uaddr: MTD_UADDR_UNNECESSARY,
DevSize: SIZE_1MiB,
CmdSet: P_ID_INTEL_EXT,
NumEraseRegions: 1,
@@ -465,6 +520,7 @@
mfr_id: MANUFACTURER_INTEL,
dev_id: I28F016S5,
name: "Intel 28F016S5",
+ uaddr: MTD_UADDR_UNNECESSARY,
DevSize: SIZE_2MiB,
CmdSet: P_ID_INTEL_EXT,
NumEraseRegions: 1,
@@ -474,6 +530,7 @@
mfr_id: MANUFACTURER_INTEL,
dev_id: I28F008SA,
name: "Intel 28F008SA",
+ uaddr: MTD_UADDR_UNNECESSARY,
DevSize: SIZE_1MiB,
CmdSet: P_ID_INTEL_STD,
NumEraseRegions: 1,
@@ -484,6 +541,7 @@
mfr_id: MANUFACTURER_INTEL,
dev_id: I28F800B3B,
name: "Intel 28F800B3B",
+ uaddr: MTD_UADDR_UNNECESSARY,
DevSize: SIZE_1MiB,
CmdSet: P_ID_INTEL_STD,
NumEraseRegions: 2,
@@ -495,6 +553,7 @@
mfr_id: MANUFACTURER_INTEL,
dev_id: I28F800B3T,
name: "Intel 28F800B3T",
+ uaddr: MTD_UADDR_UNNECESSARY,
DevSize: SIZE_1MiB,
CmdSet: P_ID_INTEL_STD,
NumEraseRegions: 2,
@@ -506,6 +565,7 @@
mfr_id: MANUFACTURER_INTEL,
dev_id: I28F016B3B,
name: "Intel 28F016B3B",
+ uaddr: MTD_UADDR_UNNECESSARY,
DevSize: SIZE_2MiB,
CmdSet: P_ID_INTEL_STD,
NumEraseRegions: 2,
@@ -517,6 +577,7 @@
mfr_id: MANUFACTURER_INTEL,
dev_id: I28F016S3,
name: "Intel I28F016S3",
+ uaddr: MTD_UADDR_UNNECESSARY,
DevSize: SIZE_2MiB,
CmdSet: P_ID_INTEL_STD,
NumEraseRegions: 1,
@@ -527,6 +588,7 @@
mfr_id: MANUFACTURER_INTEL,
dev_id: I28F016B3T,
name: "Intel 28F016B3T",
+ uaddr: MTD_UADDR_UNNECESSARY,
DevSize: SIZE_2MiB,
CmdSet: P_ID_INTEL_STD,
NumEraseRegions: 2,
@@ -538,6 +600,7 @@
mfr_id: MANUFACTURER_INTEL,
dev_id: I28F160B3B,
name: "Intel 28F160B3B",
+ uaddr: MTD_UADDR_UNNECESSARY,
DevSize: SIZE_2MiB,
CmdSet: P_ID_INTEL_STD,
NumEraseRegions: 2,
@@ -549,6 +612,7 @@
mfr_id: MANUFACTURER_INTEL,
dev_id: I28F160B3T,
name: "Intel 28F160B3T",
+ uaddr: MTD_UADDR_UNNECESSARY,
DevSize: SIZE_2MiB,
CmdSet: P_ID_INTEL_STD,
NumEraseRegions: 2,
@@ -560,6 +624,7 @@
mfr_id: MANUFACTURER_INTEL,
dev_id: I28F320B3B,
name: "Intel 28F320B3B",
+ uaddr: MTD_UADDR_UNNECESSARY,
DevSize: SIZE_4MiB,
CmdSet: P_ID_INTEL_STD,
NumEraseRegions: 2,
@@ -571,6 +636,7 @@
mfr_id: MANUFACTURER_INTEL,
dev_id: I28F320B3T,
name: "Intel 28F320B3T",
+ uaddr: MTD_UADDR_UNNECESSARY,
DevSize: SIZE_4MiB,
CmdSet: P_ID_INTEL_STD,
NumEraseRegions: 2,
@@ -582,6 +648,7 @@
mfr_id: MANUFACTURER_INTEL,
dev_id: I28F640B3B,
name: "Intel 28F640B3B",
+ uaddr: MTD_UADDR_UNNECESSARY,
DevSize: SIZE_8MiB,
CmdSet: P_ID_INTEL_STD,
NumEraseRegions: 2,
@@ -593,6 +660,7 @@
mfr_id: MANUFACTURER_INTEL,
dev_id: I28F640B3T,
name: "Intel 28F640B3T",
+ uaddr: MTD_UADDR_UNNECESSARY,
DevSize: SIZE_8MiB,
CmdSet: P_ID_INTEL_STD,
NumEraseRegions: 2,
@@ -604,6 +672,7 @@
mfr_id: MANUFACTURER_INTEL,
dev_id: I82802AB,
name: "Intel 82802AB",
+ uaddr: MTD_UADDR_UNNECESSARY,
DevSize: SIZE_512KiB,
CmdSet: P_ID_INTEL_EXT,
NumEraseRegions: 1,
@@ -613,6 +682,7 @@
mfr_id: MANUFACTURER_INTEL,
dev_id: I82802AC,
name: "Intel 82802AC",
+ uaddr: MTD_UADDR_UNNECESSARY,
DevSize: SIZE_1MiB,
CmdSet: P_ID_INTEL_EXT,
NumEraseRegions: 1,
@@ -620,8 +690,9 @@
}
}, {
mfr_id: MANUFACTURER_ST,
- dev_id: M29W800T,
- name: "ST M29W800T",
+ dev_id: M29W800DT,
+ name: "ST M29W800DT",
+ uaddr: MTD_UADDR_0x0555_0x02AA,
DevSize: SIZE_1MiB,
CmdSet: P_ID_AMD_STD,
NumEraseRegions: 4,
@@ -632,8 +703,22 @@
}
}, {
mfr_id: MANUFACTURER_ST,
+ dev_id: M29W800DB,
+ name: "ST M29W800DB",
+ uaddr: MTD_UADDR_0x0555_0x02AA,
+ DevSize: SIZE_1MiB,
+ CmdSet: P_ID_AMD_STD,
+ NumEraseRegions: 4,
+ regions: {ERASEINFO(0x04000,1),
+ ERASEINFO(0x02000,2),
+ ERASEINFO(0x08000,1),
+ ERASEINFO(0x10000,15)
+ }
+ }, {
+ mfr_id: MANUFACTURER_ST,
dev_id: M29W160DT,
name: "ST M29W160DT",
+ uaddr: MTD_UADDR_0x0555_0x02AA,
DevSize: SIZE_2MiB,
CmdSet: P_ID_AMD_STD,
NumEraseRegions: 4,
@@ -646,6 +731,7 @@
mfr_id: MANUFACTURER_ST,
dev_id: M29W160DB,
name: "ST M29W160DB",
+ uaddr: MTD_UADDR_0x0555_0x02AA,
DevSize: SIZE_2MiB,
CmdSet: P_ID_AMD_STD,
NumEraseRegions: 4,
@@ -658,6 +744,7 @@
mfr_id: MANUFACTURER_ATMEL,
dev_id: AT49BV512,
name: "Atmel AT49BV512",
+ uaddr: MTD_UADDR_0x5555_0x2AAA,
DevSize: SIZE_64KiB,
CmdSet: P_ID_AMD_STD,
NumEraseRegions: 1,
@@ -667,6 +754,7 @@
mfr_id: MANUFACTURER_ATMEL,
dev_id: AT29LV512,
name: "Atmel AT29LV512",
+ uaddr: MTD_UADDR_0x5555_0x2AAA,
DevSize: SIZE_64KiB,
CmdSet: P_ID_AMD_STD,
NumEraseRegions: 1,
@@ -678,6 +766,7 @@
mfr_id: MANUFACTURER_ATMEL,
dev_id: AT49BV16X,
name: "Atmel AT49BV16X",
+ uaddr: MTD_UADDR_0x0555_0x02AA,
DevSize: SIZE_2MiB,
CmdSet: P_ID_AMD_STD,
NumEraseRegions: 2,
@@ -688,6 +777,7 @@
mfr_id: MANUFACTURER_ATMEL,
dev_id: AT49BV16XT,
name: "Atmel AT49BV16XT",
+ uaddr: MTD_UADDR_0x0555_0x02AA,
DevSize: SIZE_2MiB,
CmdSet: P_ID_AMD_STD,
NumEraseRegions: 2,
@@ -698,6 +788,7 @@
mfr_id: MANUFACTURER_ATMEL,
dev_id: AT49BV32X,
name: "Atmel AT49BV32X",
+ uaddr: MTD_UADDR_0x0555_0x02AA,
DevSize: SIZE_4MiB,
CmdSet: P_ID_AMD_STD,
NumEraseRegions: 2,
@@ -708,6 +799,7 @@
mfr_id: MANUFACTURER_ATMEL,
dev_id: AT49BV32XT,
name: "Atmel AT49BV32XT",
+ uaddr: MTD_UADDR_0x0555_0x02AA,
DevSize: SIZE_4MiB,
CmdSet: P_ID_AMD_STD,
NumEraseRegions: 2,
@@ -718,6 +810,7 @@
mfr_id: MANUFACTURER_AMD,
dev_id: AM29F017D,
name: "AMD AM29F017D",
+ uaddr: MTD_UADDR_DONT_CARE,
DevSize: SIZE_2MiB,
CmdSet: P_ID_AMD_STD,
NumEraseRegions: 1,
@@ -727,6 +820,7 @@
mfr_id: MANUFACTURER_AMD,
dev_id: AM29F016,
name: "AMD AM29F016",
+ uaddr: MTD_UADDR_0x0555_0x02AA,
DevSize: SIZE_2MiB,
CmdSet: P_ID_AMD_STD,
NumEraseRegions: 1,
@@ -736,6 +830,7 @@
mfr_id: MANUFACTURER_AMD,
dev_id: AM29F080,
name: "AMD AM29F080",
+ uaddr: MTD_UADDR_0x0555_0x02AA,
DevSize: SIZE_1MiB,
CmdSet: P_ID_AMD_STD,
NumEraseRegions: 1,
@@ -745,6 +840,7 @@
mfr_id: MANUFACTURER_AMD,
dev_id: AM29F040,
name: "AMD AM29F040",
+ uaddr: MTD_UADDR_0x0555_0x02AA,
DevSize: SIZE_512KiB,
CmdSet: P_ID_AMD_STD,
NumEraseRegions: 1,
@@ -754,6 +850,7 @@
mfr_id: MANUFACTURER_AMD,
dev_id: AM29LV040B,
name: "AMD AM29LV040B",
+ uaddr: MTD_UADDR_0x0555_0x02AA,
DevSize: SIZE_512KiB,
CmdSet: P_ID_AMD_STD,
NumEraseRegions: 1,
@@ -763,6 +860,7 @@
mfr_id: MANUFACTURER_ST,
dev_id: M29W040B,
name: "ST M29W040B",
+ uaddr: MTD_UADDR_0x0555_0x02AA, /* FIXME - verify */
DevSize: SIZE_512KiB,
CmdSet: P_ID_AMD_STD,
NumEraseRegions: 1,
@@ -772,6 +870,7 @@
mfr_id: MANUFACTURER_MACRONIX,
dev_id: MX29LV160T,
name: "MXIC MX29LV160T",
+ uaddr: MTD_UADDR_0x0555_0x02AA, /* FIXME - for words, not bytes!! */
DevSize: SIZE_2MiB,
CmdSet: P_ID_AMD_STD,
NumEraseRegions: 4,
@@ -784,6 +883,7 @@
mfr_id: MANUFACTURER_MACRONIX,
dev_id: MX29LV160B,
name: "MXIC MX29LV160B",
+ uaddr: MTD_UADDR_0x0555_0x02AA, /* FIXME - for words, not bytes!! */
DevSize: SIZE_2MiB,
CmdSet: P_ID_AMD_STD,
NumEraseRegions: 4,
@@ -796,6 +896,7 @@
mfr_id: MANUFACTURER_MACRONIX,
dev_id: MX29F016,
name: "Macronix MX29F016",
+ uaddr: MTD_UADDR_0x0555_0x02AA,
DevSize: SIZE_2MiB,
CmdSet: P_ID_AMD_STD,
NumEraseRegions: 1,
@@ -805,6 +906,7 @@
mfr_id: MANUFACTURER_MACRONIX,
dev_id: MX29F004T,
name: "Macronix MX29F004T",
+ uaddr: MTD_UADDR_0x0555_0x02AA,
DevSize: SIZE_512KiB,
CmdSet: P_ID_AMD_STD,
NumEraseRegions: 4,
@@ -817,6 +919,7 @@
mfr_id: MANUFACTURER_MACRONIX,
dev_id: MX29F004B,
name: "Macronix MX29F004B",
+ uaddr: MTD_UADDR_0x0555_0x02AA,
DevSize: SIZE_512KiB,
CmdSet: P_ID_AMD_STD,
NumEraseRegions: 4,
@@ -829,6 +932,7 @@
mfr_id: MANUFACTURER_SST,
dev_id: SST39LF512,
name: "SST 39LF512",
+ uaddr: MTD_UADDR_0x5555_0x2AAA,
DevSize: SIZE_64KiB,
CmdSet: P_ID_AMD_STD,
NumEraseRegions: 1,
@@ -838,6 +942,7 @@
mfr_id: MANUFACTURER_SST,
dev_id: SST39LF010,
name: "SST 39LF010",
+ uaddr: MTD_UADDR_0x5555_0x2AAA,
DevSize: SIZE_128KiB,
CmdSet: P_ID_AMD_STD,
NumEraseRegions: 1,
@@ -847,6 +952,7 @@
mfr_id: MANUFACTURER_SST,
dev_id: SST39LF020,
name: "SST 39LF020",
+ uaddr: MTD_UADDR_0x5555_0x2AAA,
DevSize: SIZE_256KiB,
CmdSet: P_ID_AMD_STD,
NumEraseRegions: 1,
@@ -856,6 +962,7 @@
mfr_id: MANUFACTURER_SST,
dev_id: SST39LF040,
name: "SST 39LF040",
+ uaddr: MTD_UADDR_0x5555_0x2AAA,
DevSize: SIZE_512KiB,
CmdSet: P_ID_AMD_STD,
NumEraseRegions: 1,
@@ -865,6 +972,7 @@
mfr_id: MANUFACTURER_SST,
dev_id: SST39SF010A,
name: "SST 39SF010A",
+ uaddr: MTD_UADDR_0x5555_0x2AAA,
DevSize: SIZE_128KiB,
CmdSet: P_ID_AMD_STD,
NumEraseRegions: 1,
@@ -874,6 +982,7 @@
mfr_id: MANUFACTURER_SST,
dev_id: SST39SF020A,
name: "SST 39SF020A",
+ uaddr: MTD_UADDR_0x5555_0x2AAA,
DevSize: SIZE_256KiB,
CmdSet: P_ID_AMD_STD,
NumEraseRegions: 1,
@@ -883,6 +992,7 @@
mfr_id: MANUFACTURER_SST,
dev_id: SST49LF030A,
name: "SST 49LF030A",
+ uaddr: MTD_UADDR_0x5555_0x2AAA,
DevSize: SIZE_512KiB,
CmdSet: P_ID_AMD_STD,
NumEraseRegions: 1,
@@ -892,6 +1002,7 @@
mfr_id: MANUFACTURER_SST,
dev_id: SST49LF040A,
name: "SST 49LF040A",
+ uaddr: MTD_UADDR_0x5555_0x2AAA,
DevSize: SIZE_512KiB,
CmdSet: P_ID_AMD_STD,
NumEraseRegions: 1,
@@ -901,6 +1012,7 @@
mfr_id: MANUFACTURER_SST,
dev_id: SST49LF080A,
name: "SST 49LF080A",
+ uaddr: MTD_UADDR_0x5555_0x2AAA,
DevSize: SIZE_1MiB,
CmdSet: P_ID_AMD_STD,
NumEraseRegions: 1,
@@ -910,6 +1022,7 @@
mfr_id: MANUFACTURER_PMC,
dev_id: PM49FL002,
name: "PMC_Pm49FL002",
+ uaddr: MTD_UADDR_0x5555_0x2AAA,
DevSize: SIZE_256KiB,
CmdSet: P_ID_AMD_STD,
NumEraseRegions: 1,
@@ -920,6 +1033,7 @@
mfr_id: MANUFACTURER_PMC,
dev_id: PM49FL004,
name: "PMC_Pm49FL004",
+ uaddr: MTD_UADDR_0x5555_0x2AAA,
DevSize: SIZE_512KiB,
CmdSet: P_ID_AMD_STD,
NumEraseRegions: 1,
@@ -930,6 +1044,7 @@
mfr_id: MANUFACTURER_PMC,
dev_id: PM49FL008,
name: "PMC_Pm49FL008",
+ uaddr: MTD_UADDR_0x5555_0x2AAA,
DevSize: SIZE_1MiB,
CmdSet: P_ID_AMD_STD,
NumEraseRegions: 1,
@@ -1010,6 +1125,106 @@
return 1; /* ok */
}
+
+/*
+ * There is a BIG problem properly ID'ing the JEDEC devic and guaranteeing
+ * the mapped address, unlock addresses, and proper chip ID. This function
+ * attempts to minimize errors. It is doubtfull that this probe will ever
+ * be perfect - consequently there should be some module parameters that
+ * could be manually specified to force the chip info.
+ */
+static inline int jedec_match( __u32 base, struct map_info *map, struct cfi_private *cfi, int i )
+{
+ int blocks, blk_size; /* # blocks and block size */
+ int blk; /* block iterator */
+ int rc = 0; /* failure until all tests pass */
+ u32 mfr, id;
+
+ /* The ID's must match */
+ if ( cfi->mfr != jedec_table[i].mfr_id
+ || cfi->id != jedec_table[i].dev_id ) {
+ goto match_done;
+ }
+
+ DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): check unlock addrs 0x%.4x 0x%.4x\n",
+ __func__, cfi->addr_unlock1, cfi->addr_unlock2 );
+ /* unlock addresses must match */
+ if ( MTD_UADDR_UNNECESSARY != jedec_table[i].uaddr
+ && MTD_UADDR_DONT_CARE != jedec_table[i].uaddr
+ && ( unlock_addrs[jedec_table[i].uaddr].addr1 != cfi->addr_unlock1
+ || unlock_addrs[jedec_table[i].uaddr].addr2 != cfi->addr_unlock2 ) ) {
+ DEBUG( MTD_DEBUG_LEVEL3,
+ "MTD %s(): 0x%.4x 0x%.4x did not match\n",
+ __func__,
+ unlock_addrs[jedec_table[i].uaddr].addr1,
+ unlock_addrs[jedec_table[i].uaddr].addr2 );
+ goto match_done;
+ }
+
+ /*
+ * In ID mode the ID should be found at the start of each
+ * erase block.
+ */
+ blk_size = jedec_table[i].regions[0] >> 8;
+ blocks = ( jedec_table[i].regions[0] & 0x00ff ) + 1;
+ DEBUG( MTD_DEBUG_LEVEL3,
+ "MTD %s(): check ID's in every block: %dx%d\n",
+ __func__, blk_size, blocks );
+
+ for ( blk = 0; blk < blocks; blk++ ) {
+ mfr = cfi_read( map, blk * blk_size );
+ id = cfi_read( map, blk * blk_size + 1 );
+
+ if ( cfi->mfr != mfr || cfi->id != id ) {
+ DEBUG( MTD_DEBUG_LEVEL3,
+ "MTD %s(): did not find ID 0x%.2x:0x%.2x in block %d\n",
+ __func__, cfi->mfr, cfi->id, blk );
+ goto match_done;
+ }
+ }
+
+ /*
+ * Make sure the ID's dissappear in at least one of the blocks
+ * when the device is taken out of ID mode. The only time this
+ * should fail is when the ID's are written as data to the same
+ * addresses. For this rare and unfortunate case the chip
+ * cannot be probed correctly.
+ * FIXME - write a driver that takes all of the chip info as
+ * module parameters.
+ */
+ DEBUG( MTD_DEBUG_LEVEL3,
+ "MTD %s(): check ID's disappear when not in ID mode\n",
+ __func__ );
+ jedec_reset( base, map, cfi );
+ mfr = jedec_read_mfr( map, base, cfi );
+ id = jedec_read_id( map, base, cfi );
+ if ( mfr == cfi->mfr && id == cfi->id ) {
+ DEBUG( MTD_DEBUG_LEVEL3,
+ "MTD %s(): ID 0x%.2x:0x%.2x did not change after reset:\n"
+ "You might need to manually specify JEDEC parameters.\n",
+ __func__, cfi->mfr, cfi->id );
+ goto match_done;
+ }
+
+ /* all tests passed - mark as success */
+ rc = 1;
+
+ /*
+ * Put the device back in ID mode - only need to do this if we
+ * were truly frobbing a real device.
+ */
+ DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): return to ID mode\n", __func__ );
+ if(cfi->addr_unlock1) {
+ cfi_send_gen_cmd(0xaa, cfi->addr_unlock1, base, map, cfi, CFI_DEVICETYPE_X8, NULL);
+ cfi_send_gen_cmd(0x55, cfi->addr_unlock2, base, map, cfi, CFI_DEVICETYPE_X8, NULL);
+ }
+ cfi_send_gen_cmd(0x90, cfi->addr_unlock1, base, map, cfi, CFI_DEVICETYPE_X8, NULL);
+
+ match_done:
+ return rc;
+}
+
+
static int jedec_probe_chip(struct map_info *map, __u32 base,
struct flchip *chips, struct cfi_private *cfi)
{
@@ -1019,8 +1234,8 @@
if (!cfi->numchips) {
switch (cfi->device_type) {
case CFI_DEVICETYPE_X8:
- cfi->addr_unlock1 = 0x555;
- cfi->addr_unlock2 = 0x2aa;
+ cfi->addr_unlock1 = 0x555;
+ cfi->addr_unlock2 = 0x2aa;
break;
case CFI_DEVICETYPE_X16:
cfi->addr_unlock1 = 0xaaa;
@@ -1084,8 +1299,12 @@
printk(KERN_INFO "Search for id:(%02x %02x) interleave(%d) type(%d)\n",
cfi->mfr, cfi->id, cfi->interleave, cfi->device_type);
for (i=0; i<sizeof(jedec_table)/sizeof(jedec_table[0]); i++) {
- if (cfi->mfr == jedec_table[i].mfr_id &&
- cfi->id == jedec_table[i].dev_id) {
+ if ( jedec_match( base, map, cfi, i ) ) {
+ DEBUG( MTD_DEBUG_LEVEL3,
+ "MTD %s(): matched device 0x%x,0x%x unlock_addrs: 0x%.4x 0x%.4x\n",
+ __func__,
+ cfi->mfr, cfi->id,
+ cfi->addr_unlock1, cfi->addr_unlock2 );
if (!cfi_jedec_setup(cfi, i))
return 0;
goto ok_out;
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