mtd/html/tech nand.html,1.10,1.11
gleixner at infradead.org
gleixner at infradead.org
Mon Nov 25 16:44:42 EST 2002
Update of /home/cvs/mtd/html/tech
In directory phoenix.infradead.org:/tmp/cvs-serv30952
Modified Files:
nand.html
Log Message:
adapt to changes in nand.c, add some facts about speed
Index: nand.html
===================================================================
RCS file: /home/cvs/mtd/html/tech/nand.html,v
retrieving revision 1.10
retrieving revision 1.11
diff -u -r1.10 -r1.11
--- nand.html 24 Nov 2002 21:07:36 -0000 1.10
+++ nand.html 25 Nov 2002 21:44:38 -0000 1.11
@@ -29,7 +29,8 @@
<tr><td>Cell Size </td><td>Large </td><td>Small </td></tr>
<tr><td>Cell Cost </td><td>High </td><td>Low </td></tr>
<tr><td>Read Time </td><td>Fast </td><td>Slow </td></tr>
-<tr><td>Program Time </td><td>Fast </td><td>Slow </td></tr>
+<tr><td>Program Time single Byte</td><td>Fast </td><td>Slow </td></tr>
+<tr><td>Program Time multi Byte</td><td>Slow </td><td>Fast </td></tr>
<tr><td>Erase Time </td><td>Slow </td><td>Fast </td></tr>
<tr><td>Power consumption </td><td>High </td><td>Low, but requires additional RAM </td></tr>
<tr><td>Can execute code </td><td>Yes </td><td>No, but newer chips can execute a small
@@ -38,6 +39,12 @@
"partial page program restriction"</td></tr>
<tr><td>Bad blocks at ship time </td><td>No</td><td>Allowed</td></tr>
</table>
+
+<p>Some facts about write speed. <br>
+NAND is typically faster than NOR for large writes. A typical NOR write is 10uS
+per word, which results in 1280uS per 512 bytes on a 32-bit bus. A typical NAND
+write is 50nS per byte + 10uS page seek + 200uS program which results in 236uS
+per 512 bytes on a 8 bit bus.</p>
<p>As NAND Flash is cheaper than NOR Flash and has a very slim interface it was
selected as the optimum solution for large nonvolatile storage applications such
@@ -128,11 +135,13 @@
it really. There are a couple of SmartMedia Card adaptors for USB, PCMCIA, FireWire
... with Linux drivers available, which support the SmartMedia DOS-FAT. </p>
<p>JFFS2 and YAFFS include bad block management, wear leveling, error correction and provide
-reliable filesystems on top of NAND Flash.</p>
+reliable filesystems for industrial use on top of NAND Flash.</p>
+<hr>
<h2>Multiple filesystems on different partitions</h2>
You can mount different filesystems on different partitions of the same chip.
<h3>Technical information for filesystem implementation</h3>
+<h4>OOB usage</h4>
<p>As the OOB usage of the filesystems differs, the OOB usage can be
selected on runtime from the filesystem driver. The parameter is given to the functions
mtd->read_ecc and mtd->write_ecc. This parameter specifies the location
@@ -157,6 +166,7 @@
<p>To add a yet unsupported filesystem, the oobconfig array has to be extended and a new selection
constant has to be defined.</p>
+<h4>Read back OOB data together with main area </h4>
<p>If the fs driver needs to read the oobdata together with the raw data, then the fs-driver has to
supply a big enough buffer. <br>
size = 12 bytes * number of pages to read (256B pagesize) or 24 bytes* number of pages to read (512B pagesize) <br>
@@ -168,9 +178,10 @@
oobbuf [40-31] return code from correct_ecc byte 0-255 <br>
..... <br>
The returnvalue of read_ecc is -EIO, if any correct_ecc returned -1. But
-retlen is equal to the requested length, so fs-driver can decide what to do. <br>
+retlen is equal to the requested length, so fs-driver can decide what to do. </p>
-Oob data can be given from filesystem to program them in one go together
+<h4>Write OOB data together with main area </h4>
+<p>Oob data can be given from filesystem to program them in one go together
with the raw data. ECC codes are filled in at the place selected by oobsel.
This supports multipage programming. <br>
oobbuf[0-15] 1st page to write <br>
@@ -179,7 +190,7 @@
ECC is filled in at the appropriate place selected by the above mentioned constants.
</p>
-
+<hr>
<h2>JFFS2 specific information <h2>
<h3>JFFS2 Out of Band usage</h3>
@@ -426,26 +437,27 @@
<h3>Supported chips</h3>
<p>Most NAND chips actually available from 2 to 128MB should be supported by the current code.
If you have a chip, which is not supported, you can easily add it by extending the chiplist in
-include/linux/mtd/nand_ids.h.
+drivers/mtd/nand/nand.c. The chip name does not longer contain cryptic part numbers, as the device
+ID is just an information about size, erase block size, pagesize and operating voltage.
Add an entry, which contains following information: <br>
-{ name, manufacturer_id, model_idx, chipshift, page256, pageadrlen, erasesize }</p>
+{ name, id, chipshift, erasesize, page256 }</p>
<table border="1" cellpadding="2" cellspacing="0">
<tr><td><b>ref</b></td> <td><b>comment</b></td></tr>
-<tr><td>name</td><td>string, which identifies the chip, usually the manufacturers chip name</td></tr>
-<tr><td>manufacturer_id</td><td>manufacurer id code. This code is read during nand_scan.
-Use the existing defines for Toshiba and Samsung</td></tr>
-<tr><td>model_idx</td><td>chip model code. This code is read during nand_scan. Check datasheet
+<tr><td>name</td><td>string: "NAND 'size' 'voltage'" </td></tr>
+<tr><td>id</td><td>chip device code. This code is read during nand_scan. Check datasheet
for the code of your chip</td></tr>
<tr><td>chipshift</td><td>chip size indicator. Chip size = (1 << chipshift)</td></tr>
-<tr><td>page256</td><td>set this to 1, if your chip has pagelength 256 byte, else set it to 0.</td></tr>
-<tr><td>pageadrlen</td> <td>indicates the address size of your chip. 2 for devices < 64MB.
-3 for devices >= 64MB</td></tr>
<tr><td>erasesize</td><td>the erasesize of your chip in bytes. Consult datasheet for proper
-value.</td></tr>
+<tr><td>page256</td><td>set this to 1, if your chip has pagelength 256 byte, else set it to 0.</td></tr>
</table>
-
+
<p>Please contact NAND driver maintainer to include it in the public source tree. </p>
+<p>Manufacturer codes are scanned during nand_scan too. If the code is one of the
+known codes in the manufacturer ID table, the name of the manufacturer is printed out,
+else "Unknown" is printed. This happens when your hardware driver
+is loaded and calls nand_scan. Add codes, which are new and contact NAND driver
+maintainer to include it</p>
<h3>Config settings</h3>
<p>The following config switches have to be set. JFFS2 on NAND <b>does not</b> work,
@@ -456,7 +468,6 @@
CONFIG_MTD_CHAR=y<br>
CONFIG_MTD_BLOCK=y<br>
CONFIG_MTD_NAND=y<br>
-CONFIG_MTD_NAND_ECC=y<br>
CONFIG_MTD_NAND_YOURBOARD=y<br>
CONFIG_JFFS2_FS=y<br>
CONFIG_JFFS2_FS_DEBUG=0<br>
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