mtd/include/linux/mtd nand.h,1.14,1.15

[gleixner at infradead.org]

Update of /home/cvs/mtd/include/linux/mtd
In directory phoenix.infradead.org:/tmp/cvs-serv19093

Modified Files:
	nand.h 
Log Message:
modifications for hardware ecc support

Index: nand.h
===================================================================
RCS file: /home/cvs/mtd/include/linux/mtd/nand.h,v
retrieving revision 1.14
retrieving revision 1.15
diff -u -r1.14 -r1.15
--- nand.h	7 Aug 2002 11:12:01 -0000	1.14
+++ nand.h	10 Aug 2002 23:07:25 -0000	1.15
@@ -34,6 +34,7 @@
  *			defines in jffs2/wbuf.c
  *   08-07-2002 TG	forced bad block location to byte 5 of OOB, even if
  *			CONFIG_MTD_NAND_ECC_JFFS2 is not set
+ *   08-10-2002 TG	extensions to nand_chip structure to support HW-ECC
  *
  */
 #ifndef __LINUX_MTD_NAND_H
@@ -71,6 +72,27 @@
 #define NAND_CMD_ERASE2		0xd0
 #define NAND_CMD_RESET		0xff
 
+/* 
+ * Constants for ECC_MODES
+ *
+ * NONE:	No ECC
+ * SOFT:	Software ECC 3 byte ECC per 256 Byte data
+ * HW3_256:	Hardware ECC 3 byte ECC per 256 Byte data
+ * HW3_512:	Hardware ECC 3 byte ECC per 512 Byte data
+ *
+ *
+*/
+#define NAND_ECC_NONE		0
+#define NAND_ECC_SOFT		1
+#define NAND_ECC_HW3_256	2
+#define NAND_ECC_HW3_512	3
+
+/*
+ * Constants for Hardware ECC
+*/
+#define NAND_ECC_READ		0
+#define NAND_ECC_WRITE		1
+	
 /*
  * Enumeration for NAND flash chip state
  */
@@ -96,6 +118,20 @@
  *
  *  dev_ready - hardwarespecific function for accesing device ready/busy line
  *
+ *  waitfunc - hardwarespecific function for wait on ready
+ *
+ *  calculate_ecc - function for ecc calculation or readback from ecc hardware
+ *
+ *  correct_data - function for ecc correction, matching to ecc generator (sw/hw)
+ *
+ *  enable_hwecc - function to enable (reset) hardware ecc generator
+ *
+ *  eccmod - mode of ecc: see constants
+ *
+ *  eccsize - databytes used per ecc-calculation
+ *
+ *  chip_delay - chip dependent delay for transfering data from array to read regs (tR)
+ *
  *  chip_lock - spinlock used to protect access to this structure
  *
  *  wq - wait queue to sleep on if a NAND operation is in progress
@@ -109,11 +145,7 @@
  *  data_cache - data cache for redundant page access and shadow for
  *		 ECC failure
  *
- *  ecc_code_buf - used only for holding calculated or read ECCs for
- *                 a page read or written when ECC is in use
- *
- *  reserved - padding to make structure fall on word boundary if
- *             when ECC is in use
+ *  cache_page - number of last valid page in page_cache 
  */
 struct nand_chip {
 	unsigned long 	IO_ADDR_R;
@@ -122,6 +154,11 @@
 	int  		(*dev_ready)(void);
 	void 		(*cmdfunc)(struct mtd_info *mtd, unsigned command, int column, int page_addr);
 	int 		(*waitfunc)(struct mtd_info *mtd, struct nand_chip *this, int state);
+	void		(*calculate_ecc)(const u_char *dat, u_char *ecc_code);
+	int 		(*correct_data)(u_char *dat, u_char *read_ecc, u_char *calc_ecc);
+	void		(*enable_hwecc)(int mode);
+	int		eccmode;
+	int		eccsize;
 	int 		chip_delay;
 	spinlock_t 	chip_lock;
 	wait_queue_head_t wq;
@@ -130,10 +167,6 @@
 	u_char 		*data_buf;
 	u_char 		*data_cache;
 	int		cache_page;
-#ifdef CONFIG_MTD_NAND_ECC
-	u_char 		ecc_code_buf[6];
-	u_char 		reserved[2];
-#endif
 };
 
 /*
@@ -191,7 +224,7 @@
 #define NAND_NOOB_ECCPOS4		6
 #define NAND_NOOB_ECCPOS5		7
 #define NAND_NOOB_BADBPOS		NAND_FORCE_BADBPOS
-#define NAND_NOOB_ECCVPOS		-1
+#define NAND_NOOB_ECCVPOS		4
 
 #define NAND_JFFS2_OOB_ECCPOS0		0
 #define NAND_JFFS2_OOB_ECCPOS1		1