From d9d44925666f311fe65b7d0634cf7d2c9f00f02b Mon Sep 17 00:00:00 2001 From: "yu-chang.lee" Date: Thu, 7 Dec 2023 18:30:53 +0800 Subject: [PATCH 2/3] soc: mediatek: pm-domains: Adding back buck isolation setting for MT8188 To enable ADSP_AO, CAM_VCORE and IMG_VCORE power domains for MT8188, the buck isolation setting must be manipulated correctly. Signed-off-by: yu-chang.lee Change-Id: Ib9a4f33d27881a19f54f26981888af2af1c088ef --- drivers/pmdomain/mediatek/mt8188-pm-domains.h | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/pmdomain/mediatek/mt8188-pm-domains.h b/drivers/pmdomain/mediatek/mt8188-pm-domains.h index 2c258540ebfa..f91312c4be81 100644 --- a/drivers/pmdomain/mediatek/mt8188-pm-domains.h +++ b/drivers/pmdomain/mediatek/mt8188-pm-domains.h @@ -175,6 +175,8 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8188[] = { .ctl_offs = 0x35C, .pwr_sta_offs = 0x16C, .pwr_sta2nd_offs = 0x170, + .ext_buck_iso_offs = 0x3EC, + .ext_buck_iso_mask = BIT(10), .bp_cfg = { BUS_PROT_WR(INFRA, MT8188_TOP_AXI_PROT_EN_2_ADSP_AO_STEP1, @@ -524,6 +526,8 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8188[] = { .ctl_offs = 0x3A4, .pwr_sta_offs = 0x16C, .pwr_sta2nd_offs = 0x170, + .ext_buck_iso_offs = 0x3EC, + .ext_buck_iso_mask = BIT(12), .bp_cfg = { BUS_PROT_WR(INFRA, MT8188_TOP_AXI_PROT_EN_MM_IMG_VCORE_STEP1, @@ -608,6 +612,8 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8188[] = { .ctl_offs = 0x3A0, .pwr_sta_offs = 0x16C, .pwr_sta2nd_offs = 0x170, + .ext_buck_iso_offs = 0x3EC, + .ext_buck_iso_mask = BIT(11), .bp_cfg = { BUS_PROT_WR(INFRA, MT8188_TOP_AXI_PROT_EN_MM_CAM_VCORE_STEP1, -- 2.18.0