[PATCH v2 0/2] ufs: fix POST_CHANGE pairing and AHIT race condition
chun-hung.wu
chun-hung.wu at mediatek.com
Tue Sep 22 03:06:53 PDT 2026
On Mon, 2026-09-14 at 16:49 +0800, peter.wang at mediatek.com wrote:
> From: Peter Wang <peter.wang at mediatek.com>
>
> Patch 1 fixes a bug where POST_CHANGE was skipped on a failed gear
> switch, leaving the host in an inconsistent state if resources
> acquired
> in PRE_CHANGE were never released.
>
> Patch 2 fixes a race between the sysfs AHIT update path and the
> MediaTek host driver's power mode change path. A mutex and depth
> counter are introduced to serialize AHIT register access and ensure
> AHIT is correctly restored after the last disabler completes.
>
> The two patches are related: patch 1 guarantees POST_CHANGE is always
> called, ensuring the depth counter introduced in patch 2 is always
> properly decremented.
>
> Peter Wang (2):
> ufs: always notify POST_CHANGE even on gear switch failure
> ufs: serialize AHIT register access between sysfs and host driver
>
> drivers/ufs/core/ufshcd.c | 22 +++++++++++++++++++---
> drivers/ufs/host/ufs-exynos.c | 4 +++-
> drivers/ufs/host/ufs-mediatek.c | 16 ++++++++++++----
> drivers/ufs/host/ufshcd-pci.c | 3 ++-
> include/ufs/ufshcd.h | 8 ++++++++
> 5 files changed, 44 insertions(+), 9 deletions(-)
>
Reviewed-by: Chun-Hung Wu <chun-hung.wu at mediatek.com>
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