[PATCH 1/2] ASoC: mediatek: mt8183: Leave cache-only mode before enabling clocks
Ajay Kumar Nandam
ajay.nandam at oss.qualcomm.com
Fri Oct 16 05:00:47 PDT 2026
On 10/16/2026 1:44 PM, HuskerMinion via B4 Relay wrote:
> From: HuskerMinion <mocker-mug-unwoven at duck.com>
>
> The audiosys clock gates are bits in AUDIO_TOP_CON0 and AUDIO_TOP_CON1.
> The clock driver writes them through the audiosys syscon regmap, which
> is the same regmap the AFE driver uses. The AFE marks both registers
> volatile, so while the regmap is cache-only, regmap_update_bits() on
> them returns -EBUSY and nothing reaches the hardware. The MediaTek gate
> clock ops ignore that error.
>
> mt8183_afe_runtime_resume() calls mt8183_afe_enable_clock() first and
> only then takes the regmap out of cache-only mode. After probe the
> regmap is always cache-only at that point, so the gate enables are
> dropped. The clock framework then counts the AFE and I2S gates as
> enabled while they are still closed in hardware.
>
> On the Amazon Echo Show 8 (2nd gen) the bootloader leaves these gates
> closed. Playback and capture never start: the memif current pointer
> stays at 0, no AFE interrupt fires and aplay fails with an I/O error.
> clk_summary lists aud_afe and aud_i2s1 as enabled, but with hardware
> enable N, and their power-down bits in AUDIO_TOP_CON0 are still set.
>
> Leave cache-only mode before enabling the clocks, and go back to
> cache-only mode if enabling them fails. The bypass case used during
> probe is unchanged.
>
> Fixes: a94aec035a12 ("ASoC: mediatek: mt8183: add platform driver")
> Cc: stable at vger.kernel.org
> Signed-off-by: HuskerMinion <mocker-mug-unwoven at duck.com>
This fixes the ordering on resume, but what about the suspend path?
runtime_suspend() still switches the regmap to cache-only before calling
mt8183_afe_disable_clock(). Should the clocks be disabled before
switching the regmap back to cache-only?
Thanks
Ajay Kumar Nandam
> ---
> sound/soc/mediatek/mt8183/mt8183-afe-pcm.c | 16 +++++++++++++---
> 1 file changed, 13 insertions(+), 3 deletions(-)
>
> diff --git a/sound/soc/mediatek/mt8183/mt8183-afe-pcm.c b/sound/soc/mediatek/mt8183/mt8183-afe-pcm.c
> index d8938542b..d6175da3b 100644
> --- a/sound/soc/mediatek/mt8183/mt8183-afe-pcm.c
> +++ b/sound/soc/mediatek/mt8183/mt8183-afe-pcm.c
> @@ -706,16 +706,26 @@ static int mt8183_afe_runtime_resume(struct device *dev)
> {
> struct mtk_base_afe *afe = dev_get_drvdata(dev);
> struct mt8183_afe_private *afe_priv = afe->platform_priv;
> + bool reg_ctl = afe->regmap && !afe_priv->pm_runtime_bypass_reg_ctl;
> int ret;
>
> + /*
> + * The audiosys clock gates are written through this same regmap and
> + * are volatile, so their writes are dropped while it is cache-only.
> + */
> + if (reg_ctl)
> + regcache_cache_only(afe->regmap, false);
> +
> ret = mt8183_afe_enable_clock(afe);
> - if (ret)
> + if (ret) {
> + if (reg_ctl)
> + regcache_cache_only(afe->regmap, true);
> return ret;
> + }
>
> - if (!afe->regmap || afe_priv->pm_runtime_bypass_reg_ctl)
> + if (!reg_ctl)
> goto skip_regmap;
>
> - regcache_cache_only(afe->regmap, false);
> regcache_sync(afe->regmap);
>
> /* enable audio sys DCM for power saving */
>
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