[PATCH net-next v3 5/9] net: stmmac: mediatek: add RX/TX delay stage divider in platform data

Maxime Chevallier maxime.chevallier at bootlin.com
Fri Oct 16 04:37:37 PDT 2026


Hi Louis-Alexis,

On 10/16/26 12:31, Louis-Alexis Eyraud wrote:
> In preparation of newer SoC support, that have like MT8189 SoC
> different RX and TX internal delay stage steps than MT8188/MT8195, add
> the RX and TX delay stage divider values in the variant platform data
> and replace the hardcoded value uses in mt2712_set_delay and
> mt8195_set_delay.
> 
> Reviewed-by: Maxime Chevallier <maxime.chevallier at bootlin.com>
> Signed-off-by: Louis-Alexis Eyraud <louisalexis.eyraud at collabora.com>
> ---
>  .../net/ethernet/stmicro/stmmac/dwmac-mediatek.c   | 46 ++++++++++++++++++----
>  1 file changed, 38 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c
> index 596411d4a5b2..cb5bda53edb9 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c
> @@ -108,6 +108,10 @@ struct mediatek_dwmac_variant {
>  
>  	u32 rx_delay_max;
>  	u32 tx_delay_max;
> +	u16 rx_rmii_delay_stage_div;
> +	u16 tx_rmii_delay_stage_div;
> +	u16 rx_rgmii_delay_stage_div;
> +	u16 tx_rgmii_delay_stage_div;
>  	u8 dma_bit_mask;
>  };
>  
> @@ -146,14 +150,22 @@ static int mt2712_set_delay(struct mediatek_dwmac_plat_data *plat)
>  	u32 fine_val = 0;
>  
>  	if (phy_interface_mode_is_rgmii(plat->phy_mode)) {
> -		rx_delay_stage_div = MT2712_RGMII_DLY_RXC_STAGE_DIV;
> -		tx_delay_stage_div = MT2712_RGMII_DLY_TXC_STAGE_DIV;
> +		rx_delay_stage_div = plat->variant->rx_rgmii_delay_stage_div;
> +		tx_delay_stage_div = plat->variant->tx_rgmii_delay_stage_div;
>  	} else {
> -		rx_delay_stage_div = MT2712_RMII_DLY_RXC_STAGE_DIV;
> -		tx_delay_stage_div = MT2712_RMII_DLY_TXC_STAGE_DIV;
> +		rx_delay_stage_div = plat->variant->rx_rmii_delay_stage_div;
> +		tx_delay_stage_div = plat->variant->tx_rmii_delay_stage_div;

Looking closer at this, what's RMII delay ? There's no delays in RMII, and
it's a single clock not a RX and TX clock like RGMII, there's no RMII TXC/RXC.

I think it's the same as on allwinner, the delay handling has been mixed-up between
RMII and RGMII in the glue, you should be able to simplify this even more by
ditching the RMII case.

Maxime



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