[PATCH v2 03/14] ASoC: mediatek: mt8195: Fix register access clock error handling

Ajay Kumar Nandam ajay.nandam at oss.qualcomm.com
Thu Oct 8 04:25:03 PDT 2026



On 10/5/2026 4:32 PM, phucduc.bui at gmail.com wrote:
> From: bui duc phuc <phucduc.bui at gmail.com>
> 
> Check the return value of mt8195_afe_enable_clk() when enabling the
> register access clocks.
> 
> If enabling a clock fails, disable the clocks that were already
> enabled and propagate the error to the caller
> 
> Fixes: 6746cc858259 ("ASoC: mediatek: mt8195: add platform driver")
> Signed-off-by: bui duc phuc <phucduc.bui at gmail.com>

Reviewed-by: Ajay Kumar Nandam <ajay.nandam at oss.qualcomm.com>

> ---
>   sound/soc/mediatek/mt8195/mt8195-afe-clk.c | 15 ++++++++++++---
>   1 file changed, 12 insertions(+), 3 deletions(-)
> 
> diff --git a/sound/soc/mediatek/mt8195/mt8195-afe-clk.c b/sound/soc/mediatek/mt8195/mt8195-afe-clk.c
> index 12d8159338be..34c828fdea29 100644
> --- a/sound/soc/mediatek/mt8195/mt8195-afe-clk.c
> +++ b/sound/soc/mediatek/mt8195/mt8195-afe-clk.c
> @@ -599,7 +599,7 @@ static int mt8195_afe_disable_top_cg(struct mtk_base_afe *afe, unsigned int cg_t
>   int mt8195_afe_enable_reg_rw_clk(struct mtk_base_afe *afe)
>   {
>   	struct mt8195_afe_private *afe_priv = afe->platform_priv;
> -	int i;
> +	int i, ret;
>   	static const unsigned int clk_array[] = {
>   		MT8195_CLK_SCP_ADSP_AUDIODSP, /* bus clock for infra */
>   		MT8195_CLK_TOP_AUDIO_H_SEL, /* clock for ADSP bus */
> @@ -611,10 +611,19 @@ int mt8195_afe_enable_reg_rw_clk(struct mtk_base_afe *afe)
>   		MT8195_CLK_AUD_A1SYS, /* AFE HW clock */
>   	};
>   
> -	for (i = 0; i < ARRAY_SIZE(clk_array); i++)
> -		mt8195_afe_enable_clk(afe, afe_priv->clk[clk_array[i]]);
> +	for (i = 0; i < ARRAY_SIZE(clk_array); i++) {
> +		ret = mt8195_afe_enable_clk(afe, afe_priv->clk[clk_array[i]]);
> +		if (ret)
> +			goto err_disable_clk;
> +	}
>   
>   	return 0;
> +
> +err_disable_clk:
> +	while (--i >= 0)
> +		mt8195_afe_disable_clk(afe, afe_priv->clk[clk_array[i]]);
> +
> +	return ret;
>   }
>   
>   int mt8195_afe_disable_reg_rw_clk(struct mtk_base_afe *afe)




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