[PATCH v3 4/7] PCI: dwc: Use common pci_host_common_link_train_delay() helper
Krzysztof Wilczyński
kwilczynski at kernel.org
Mon May 11 00:02:42 PDT 2026
Hello,
> - /*
> - * As per PCIe r6.0, sec 6.6.1, a Downstream Port that supports Link
> - * speeds greater than 5.0 GT/s, software must wait a minimum of 100 ms
> - * after Link training completes before sending a Configuration Request.
> - */
> - if (pci->max_link_speed > 2)
> - msleep(PCIE_RESET_CONFIG_WAIT_MS);
> + pci_host_common_link_train_delay(pci->max_link_speed);
This comment could move to the helper you added.
Thank you!
Krzysztof
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